Takuya Yamaguchi, Hideki Okumura, T. Shiraishi, Tsuyoshi Fujita, Yoshifumi Ata, Kenya Kobayashi
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High aspect ratio deep trench termination (HARDT2) technique surrounding die edge as dielectric wall to improve high voltage device area efficiency
In high voltage power devices, to improve an active device area efficiency, a new edge termination structure that applying high aspect ratio deep trench termination technique is presented. The narrow trench filled with dielectric material acts as not only an electric field relaxing layer but also a reliable hard passivation. By using this technique, the active device area efficiency is maximized up to 96% with high reliability and good dynamic characteristics for 500 to 600 V MOSFETs.
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