Design of radix-4,16,32 approx booth multiplier using Error Tolerant Application

Approximate computing has a very important contribution in the multimedia world. Approximate computing consists of arithmetic circuits such as adder, multiplier etc. Which are based on the approximate technique or error tolerant application. These arithmetic circuits have high efficiency and better performance, but less accurate. In an electronic world, many applications are used such as signal processing, network signaling, image processing, neural networks where multiplier is used as an arithmetic circuit. In this way, approximate multiplier shows some mean error which is not so important at large. This multiplier makes significant improvements in power, delay, and area at the expense of reducing accuracy. The approximate multiplier is to use less power and area than conventional truncated multiplier, and keep high speed. Its main purpose is to speed up the speed of arithmetic circuits as well as spend low power. A lot of process is being taken to fulfill this objective Like ETM (Error tolerant Multiplier), UDM (Under designed Multiplier), AWTM (Approx Wallace Tree Multiplier), AM (Approx Multiplier). In this paper, the approximate Booth Multiplier has been designed which works on error tolerant multiplication (ETM) technology and provides high performance for the DSP application. This Error Tolerant Application easily restrict on accuracy and achieve various improvement in power consumption and speed accuracy. A new type of approximate multiplier has been designed in this multiplier which can increase the speed by reducing the partial product of the traditional multiplier. According to this paper is to design such a high-speed radix signed approximate booth multiplier which provides significant improvements in power, delay and area at low cost performance in accuracy.