{"title":"采用双栅极FinFET技术的高能效多路复用器设计","authors":"M. Vyas, S. Manna, S. Akashe","doi":"10.1109/ICCN.2015.23","DOIUrl":null,"url":null,"abstract":"This paper presents the design and analysis of a 2:1 multiplexer. The conventional circuit of 2:1 multiplexer(MUX) is used for the calculation of different parameters like power consumption, noise, delay, leakage power, etc. The multiplexer designed in this paper is suitable for low-power applications and works on very low supply voltage. Multiplexer is a digital circuit, it consists of 2N input and has n select line which are used to select the input line to transmit to the output. The multiplexer are used to expand the measure of information that can be sent over the system of a sure measure of time and bandwidth. Multiplexer comprises of multiple input signals and gives a single output switch. In this paper, a novel FinFET technique is used for the reduction of leakage power. The parameters of the conventional circuit and FinFET are compared and the performance of the multiplexer circuit is increased. The proposed multiplexer works on supply voltage of 0.7V. The design and simulation of FinFET based 2:1 multiplexer is done by using 45nm technology at cadence virtuoso version 6.1 platform.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Design of power efficient multiplexer using dual-gate FinFET technology\",\"authors\":\"M. Vyas, S. Manna, S. Akashe\",\"doi\":\"10.1109/ICCN.2015.23\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and analysis of a 2:1 multiplexer. The conventional circuit of 2:1 multiplexer(MUX) is used for the calculation of different parameters like power consumption, noise, delay, leakage power, etc. The multiplexer designed in this paper is suitable for low-power applications and works on very low supply voltage. Multiplexer is a digital circuit, it consists of 2N input and has n select line which are used to select the input line to transmit to the output. The multiplexer are used to expand the measure of information that can be sent over the system of a sure measure of time and bandwidth. Multiplexer comprises of multiple input signals and gives a single output switch. In this paper, a novel FinFET technique is used for the reduction of leakage power. The parameters of the conventional circuit and FinFET are compared and the performance of the multiplexer circuit is increased. The proposed multiplexer works on supply voltage of 0.7V. The design and simulation of FinFET based 2:1 multiplexer is done by using 45nm technology at cadence virtuoso version 6.1 platform.\",\"PeriodicalId\":431743,\"journal\":{\"name\":\"2015 International Conference on Communication Networks (ICCN)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 International Conference on Communication Networks (ICCN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCN.2015.23\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 International Conference on Communication Networks (ICCN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCN.2015.23","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
摘要
本文介绍了一种2:1多路复用器的设计与分析。传统的2:1多路复用器(MUX)电路用于计算功耗、噪声、延迟、漏功率等不同参数。本文设计的多路复用器适用于低功耗应用,工作在极低的电源电压下。多路复用器是一种数字电路,它由2N个输入和n条选择线组成,用于选择输入线传输到输出。多路复用器用于扩展可以在一定时间和带宽的系统上发送的信息的度量。多路复用器由多个输入信号和一个输出开关组成。本文采用一种新颖的FinFET技术来降低漏功率。比较了传统电路和FinFET的参数,提高了多路复用电路的性能。该多路复用器工作在0.7V的电源电压下。采用45nm技术,在cadence virtuoso version 6.1平台上完成了基于FinFET的2:1多路复用器的设计与仿真。
Design of power efficient multiplexer using dual-gate FinFET technology
This paper presents the design and analysis of a 2:1 multiplexer. The conventional circuit of 2:1 multiplexer(MUX) is used for the calculation of different parameters like power consumption, noise, delay, leakage power, etc. The multiplexer designed in this paper is suitable for low-power applications and works on very low supply voltage. Multiplexer is a digital circuit, it consists of 2N input and has n select line which are used to select the input line to transmit to the output. The multiplexer are used to expand the measure of information that can be sent over the system of a sure measure of time and bandwidth. Multiplexer comprises of multiple input signals and gives a single output switch. In this paper, a novel FinFET technique is used for the reduction of leakage power. The parameters of the conventional circuit and FinFET are compared and the performance of the multiplexer circuit is increased. The proposed multiplexer works on supply voltage of 0.7V. The design and simulation of FinFET based 2:1 multiplexer is done by using 45nm technology at cadence virtuoso version 6.1 platform.