{"title":"集成型高速模数转换器","authors":"K. Kondo, K. Watanabe","doi":"10.1109/IMTC.1989.36809","DOIUrl":null,"url":null,"abstract":"An analog-to-digital converter consisting of a switched-capacitor integrator, comparator, and control circuit is presented. The conversion process consists of voltage-to-frequency conversion to determine the upper M bits of an N-bit representation of an input analog voltage and subsequent voltage-to-time conversion to determine the remaining lower N-M bits. The total clock cycle required for N-bit resolution is 2/sup M/+2/sup N-M/ at most. The circuits for the two conversions have most of their components in common and thus can be implemented with minimum component count. Error analysis shows that a conversion accuracy higher than 12 bits can be expected from a CMOS monolithic realization. Prototype converters built using discrete components have confirmed the principles of operation.<<ETX>>","PeriodicalId":298343,"journal":{"name":"6th IEEE Conference Record., Instrumentation and Measurement Technology Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"An integration-type high speed analog-to-digital converter\",\"authors\":\"K. Kondo, K. Watanabe\",\"doi\":\"10.1109/IMTC.1989.36809\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An analog-to-digital converter consisting of a switched-capacitor integrator, comparator, and control circuit is presented. The conversion process consists of voltage-to-frequency conversion to determine the upper M bits of an N-bit representation of an input analog voltage and subsequent voltage-to-time conversion to determine the remaining lower N-M bits. The total clock cycle required for N-bit resolution is 2/sup M/+2/sup N-M/ at most. The circuits for the two conversions have most of their components in common and thus can be implemented with minimum component count. Error analysis shows that a conversion accuracy higher than 12 bits can be expected from a CMOS monolithic realization. Prototype converters built using discrete components have confirmed the principles of operation.<<ETX>>\",\"PeriodicalId\":298343,\"journal\":{\"name\":\"6th IEEE Conference Record., Instrumentation and Measurement Technology Conference\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-04-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"6th IEEE Conference Record., Instrumentation and Measurement Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMTC.1989.36809\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"6th IEEE Conference Record., Instrumentation and Measurement Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.1989.36809","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An integration-type high speed analog-to-digital converter
An analog-to-digital converter consisting of a switched-capacitor integrator, comparator, and control circuit is presented. The conversion process consists of voltage-to-frequency conversion to determine the upper M bits of an N-bit representation of an input analog voltage and subsequent voltage-to-time conversion to determine the remaining lower N-M bits. The total clock cycle required for N-bit resolution is 2/sup M/+2/sup N-M/ at most. The circuits for the two conversions have most of their components in common and thus can be implemented with minimum component count. Error analysis shows that a conversion accuracy higher than 12 bits can be expected from a CMOS monolithic realization. Prototype converters built using discrete components have confirmed the principles of operation.<>