III-Vs在VLSI上MBE生长时氮化硅作为扩散势垒的沉积条件依赖性

J. A. Walker, K. Goossen, J. Cunningham, W.Y. Ian
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引用次数: 0

摘要

在CMOS器件上GaAs的异质外延过程中,有必要保护二氧化硅不受镓的影响,因为镓很容易扩散到SiO2中。我们发现这种扩散会产生导电氧化物。由于先前已经证明氮化硅抑制镓的扩散[11],因此本文将其用作MBE生长过程中的扩散屏障。然而,为了使氮化物成功地用于此目的,它必须对生长前用于清洁硅表面的氢氟酸(HF)具有足够的抵抗力。此外,它必须具有足够的机械强度,能够经受高温(900”C)的氧化物解吸步骤,这对于成功地将GaAs外延在Si上而不破裂或失去附着力是必要的。后者对于亚微米CMOS尤其重要,它利用可回流玻璃(850”C)来圆接触孔的边缘。我们发现这种回流玻璃的液化对氮化物扩散屏障产生了很大的应力。我们已经确定了等离子体增强化学气相沉积(PECVD)氮化硅的条件对氮化硅满足上述两个要求的能力至关重要,并在这里进行了讨论。在MBE生长之前的MOSFET结构的截面如图1所示。CMOS制造是在(100)硅中进行的,取向为3“离轴向(110),这是在硅[2]上高质量GaAs生长所需要的。由于MBE涉及的高温,有必要在一级金属化之前进行生长。在这里使用的亚微米CMOS技术中,场氧化物介电结构的最顶层薄膜要求是可回流玻璃,如磷硅酸盐玻璃或BPTEOS,其熔点低于标准sio2。回流玻璃的目的是使接触孔的顶角变圆,以确保在晶体管金属化过程中良好的台阶覆盖。在通过电介质[3]打开接触孔后,通过800-850℃的热处理来实现这种圆角。然后用氨和硅烷沉积的标准PECVD氮化硅钝化晶圆。通过反应离子蚀刻sio2、回流玻璃和氮化硅的介电层,打开用于MBE生长的裸硅区域,然后使用专用的湿化学清洁[4],包括使用HF酸,以制备裸露的硅表面用于生长。生长序列的第一步是通过在MBE室真空下900-950 "C的氧化物解吸去除形成在硅开放区域表面的天然氧化物。一旦氧化物被去除,外延膜生长,形成GaAs/AlGaAs多量子阱调制器。这一增长的细节在另一份出版物[5]中给出。当使用CMOS铸造厂生产的标准氮化物薄膜时,确定薄膜不能承受热循环而不开裂。这对氮化膜的厚度是正确的。用氨沉积的PECVD氮化硅薄膜含有高达30%的氢,导致高拉伸应力和较差的机械性能。然而,仅使用硅烷和氮沉积的PECVD氮化膜的氢含量要低得多(7- 15%),拉伸应力水平接近零[7]。因此,我们在此研究了这些气体在亚微米CMOS上进行热循环时沉积的氮化物的开裂和粘附。此外,我们测量了这些薄膜的一般性质(HF蚀刻率和折射率)在氮:硅烷气体比(53:1至1250:1)与[7](30:1至167:1)的研究范围内,发现这些性质(特别是HF蚀刻率)有很大的不同,如图2所示。我们发现,在相同的气体比(<300:1)下,实现了机械稳定性和抗HF性,使这些薄膜非常适合用作CMOS上MBE的镓扩散屏障。
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Deposition Condition Dependence Of Silicon Nitride Used As A Diffusion Barrier During MBE Growth Of III-Vs On Silicon VLSI Electronics
During the heteroepitaxy of GaAs on CMOS devices, it is necessary to protect the silicon dioxide from gallium, which diffuses readily into SiO2. We have found that such diffusion results in a conductive oxide. Since it has been shown previously that silicon nitride inhibits the diffusion of gallium [ 11, it was used here as the diffusion barrier during MBE growth. In order for the nitride to be successfully used for this purpose however, it must have sufficient resistance to hydrofluoric acid (HF) used to clean the silicon surface prior to growth. In addition, it must be mechanically robust enough to undergo a high temperature (900 "C) oxide desorption step necessary for the successful epitaxy of GaAs on Si without cracking or losing adhesion. The latter is especially critical for sub-micron CMOS, which utilizes a reflowable glass (at 850 "C) to round the edges of the contact holes. We have found that this liquificatioii of the reflow glass places a large stress on the nitride diffusion barrier. We have determined that the conditions during the plasma enhanced chemical vapor deposition (PECVD) of silicon nitride are critical to the ability of the nitride to fulfill both of the above requirements, and they are discussed here. A cross-section of the MOSFET structure just prior to MBE growth is shown in Figure 1. The CMOS fabrication was done in (100) silicon oriented 3" off axis toward the (1 10) as required for high quality GaAs growth on silicon [2]. Due to the high temperatures involved with MBE, it was necessary to perform growth just prior to first level metalization. In submicron CMOS technology such as that used here, the topmost film in the field oxide dielectric structure is required to be a reflowable glass such as phosphosilicate glass or BPTEOS, which has a lower melting point than that of standard Si02. The purpose of the reflow glass is to allow the rounding of the top comers of the contact holes to ensure good step coverage during the metalization of the transistors. This rounding is achieved through a heat treatment at 800-850 OC after the contact holes are opened through the dielectrics [3]. Our wafers were then passivated with a standard PECVD silicon nitride deposited using ammonia and silane. Bare silicon areas for MBE growth were opened by reactive ion etching through the dielectric stack of Si02, reflow glass, and silicon nitride, followed by a specialized wet chemical clean [4] including the use of HF acid in order to prepare the exposed silicon surface for growth. The first step in the growth sequence is the removal of the native oxide which forms on the surface of the open areas of silicon by means of a 900-950 "C oxide desorption done under vacuum in the MBE chamber. Once the oxide is removed, the epitaxial films are grown from which the GaAs/AlGaAs multiple quantum well modulators are formed. The details of this growth are given in a separate publication [5]. When using the standard nitride films from the CMOS foundry, it was determined that the films could not withstand the thermal cycling without cracking. This was true of a n y thickness of nitride film. PECVD silicon nitride films deposited with the use of ammonia have been determined to contain up to 30 % hydrogen resulting in high tensile stress and poor mechanical performance [6]. PECVD nitride films deposited using only silane and nitrogen however have been shown to have a much lower percentage (7-15 %) of hydrogen and tensile stress levels near zero [7]. Therefore here we explore cracking and adhesion of nitride deposited using these gases when subjected to the thermal cycling on submicron CMOS. In addition, we have measured the general properties of these films (HF etch rate and refractive index) over a greatly extended range of nitrogen:silane gas ratios (53: 1 to 1250: 1) compared to that studied in [7] (30:l to 167:l) and find that these properties (especially HF etch rate) vary considerably as shown in Figure 2. We find that mechanical stability and resistance to HF is acheived for the same gas ratios (<300:1), making these films ideally suited for use as a gallium diffusion barrier during MBE on CMOS.
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