碳化硅功率半导体器件的VHDL - AMS建模

A. Kashyap, C. Vemulapally, H. Mantooth
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引用次数: 7

摘要

VHDL-AMS正在成为设备和系统的标准建模语言。本文介绍了一种新的建模工具Paragon,它可以帮助用户仅使用拓扑和特征方程创建模型。然后,Paragon在各种hdl(如VHDL-AMS、MAST和Verilog-A)中生成模型。作为一个例子,使用Paragon对碳化硅垂直JFET/SIT进行了建模。SiC jfet是一种功率开关,在工业上有多种应用。基于器件的几何形状和SiC材料的特性,在VHDL-AMS中建立了紧凑的模型。该模型已在mentor graphics的系统视觉VHDL-AMS模拟器中进行了测试,验证结果表明,它清楚地复制了实验表征中所看到的行为。
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VHDL - AMS modeling of silicon carbide power semiconductor devices
VHDL-AMS is gaining ground as the standard modeling language for devices and systems. A new modeling tool, Paragon, is presented in this work that helps the user to create models with only the topology and the characteristic equations. Paragon then generates the model in various HDLs such as VHDL-AMS, MAST and Verilog-A. As an example, a silicon carbide vertical JFET/SIT is modeled using Paragon. SiC JFETs are power switches that have a variety of applications in the industry. A compact model is developed in VHDL-AMS based on the device geometry and SiC material properties. The on-state model has been tested in mentor graphics' system vision VHDL-AMS simulator and it clearly replicates the behavior seen in experimental characterization as the validation results show.
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