Heterojunction BiFET technology for high speed electronic systems

A GaAs BiFET LSI technology has been successfully developed for high speed, low power and mixed signal circuit applications. The direct placement of the FET on the HBT emitter cap layer simplifies the device epitaxial growth and process integration. High integration levels and functional circuit yield have been achieved. Excellent HBT and FET characteristics have bean produced, with the noise figure of the FETs comparable to those of traditional MESFETs, enabling them to perform well in front end receiver applications. Through this technology, several LSI circuits, including a 2 Gsps 2-bit prototype DRFM, 2 GHz 32/spl times/2 bit shift registers, sample and hold circuits with 9-bit resolution at 200 Msps and SRAMs with ultra-fast access time (330 ps) have been successfully demonstrated.