采用1-2 MASH结构的80dB DR 6MHz带宽流水线噪声整形SAR ADC

Sein Oh, Younggyun Oh, Juyoung Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, Hyungil Chae
{"title":"采用1-2 MASH结构的80dB DR 6MHz带宽流水线噪声整形SAR ADC","authors":"Sein Oh, Younggyun Oh, Juyoung Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, Hyungil Chae","doi":"10.1109/CICC48029.2020.9075929","DOIUrl":null,"url":null,"abstract":"A pipelined NS-SAR ADC with 1–2 MASH structure is presented. Two-stage pipelined structure consisting of 5-bit NS-SAR and 4-bit NS-SAR ADCs shows 3rd-order noise-shaping. To maximize power efficiency, a single operational transconductance amplifier (OTA) is reused for both an integrator for noise shaping and a residue amplifier for pipelining. The measured DR is 80dB when the sampling rate is 83.3MS/s and bandwidth is 6MHz, and power consumption is 3.5mW showing FoMs,DR of 172.3dB. The proposed ADC structure greatly relaxes design requirement of each SAR quantizer, and can achieve high resolution and wide bandwidth with good power efficiency.","PeriodicalId":409525,"journal":{"name":"2020 IEEE Custom Integrated Circuits Conference (CICC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1–2 MASH structure\",\"authors\":\"Sein Oh, Younggyun Oh, Juyoung Lee, Kihyun Kim, Seungjun Lee, Jintae Kim, Hyungil Chae\",\"doi\":\"10.1109/CICC48029.2020.9075929\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A pipelined NS-SAR ADC with 1–2 MASH structure is presented. Two-stage pipelined structure consisting of 5-bit NS-SAR and 4-bit NS-SAR ADCs shows 3rd-order noise-shaping. To maximize power efficiency, a single operational transconductance amplifier (OTA) is reused for both an integrator for noise shaping and a residue amplifier for pipelining. The measured DR is 80dB when the sampling rate is 83.3MS/s and bandwidth is 6MHz, and power consumption is 3.5mW showing FoMs,DR of 172.3dB. The proposed ADC structure greatly relaxes design requirement of each SAR quantizer, and can achieve high resolution and wide bandwidth with good power efficiency.\",\"PeriodicalId\":409525,\"journal\":{\"name\":\"2020 IEEE Custom Integrated Circuits Conference (CICC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE Custom Integrated Circuits Conference (CICC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC48029.2020.9075929\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Custom Integrated Circuits Conference (CICC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC48029.2020.9075929","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

摘要

提出了一种具有1-2 MASH结构的流水线NS-SAR ADC。由5位NS-SAR和4位NS-SAR adc组成的两级流水线结构具有三阶噪声整形。为了最大限度地提高功率效率,单个操作跨导放大器(OTA)可重复用于噪声整形的积分器和用于管道的残留放大器。当采样率为83.3MS/s,带宽为6MHz时,测量到的DR为80dB,功耗为3.5mW,显示FoMs,DR为172.3dB。所提出的ADC结构大大放宽了每个SAR量化器的设计要求,并能实现高分辨率、宽带宽和良好的功耗效率。
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A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1–2 MASH structure
A pipelined NS-SAR ADC with 1–2 MASH structure is presented. Two-stage pipelined structure consisting of 5-bit NS-SAR and 4-bit NS-SAR ADCs shows 3rd-order noise-shaping. To maximize power efficiency, a single operational transconductance amplifier (OTA) is reused for both an integrator for noise shaping and a residue amplifier for pipelining. The measured DR is 80dB when the sampling rate is 83.3MS/s and bandwidth is 6MHz, and power consumption is 3.5mW showing FoMs,DR of 172.3dB. The proposed ADC structure greatly relaxes design requirement of each SAR quantizer, and can achieve high resolution and wide bandwidth with good power efficiency.
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