一元DAC阵列中一维线性梯度误差补偿的最优开关序列

Yonghua Cong, R. Geiger
{"title":"一元DAC阵列中一维线性梯度误差补偿的最优开关序列","authors":"Yonghua Cong, R. Geiger","doi":"10.1109/MWSCAS.2000.951458","DOIUrl":null,"url":null,"abstract":"Gradient error can be compensated by optimizing switching sequences of DAC arrays. This paper establishes an absolute lower bound of integral nonlinearity (INL) which may be achieved by optimizing switching sequences. Optimal switching sequences that meet this lower bound are presented for one-dimensional linear gradient error compensation in unary (thermometer decoded) DAC arrays. The sequences can be used in row-column decoded current or capacitor unary arrays as well as R-string DACs, where the switching sequence is optimized in one dimension.","PeriodicalId":437349,"journal":{"name":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","volume":"90 23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Optimal switching sequences for one-dimensional linear gradient error compensation in unary DAC arrays\",\"authors\":\"Yonghua Cong, R. Geiger\",\"doi\":\"10.1109/MWSCAS.2000.951458\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Gradient error can be compensated by optimizing switching sequences of DAC arrays. This paper establishes an absolute lower bound of integral nonlinearity (INL) which may be achieved by optimizing switching sequences. Optimal switching sequences that meet this lower bound are presented for one-dimensional linear gradient error compensation in unary (thermometer decoded) DAC arrays. The sequences can be used in row-column decoded current or capacitor unary arrays as well as R-string DACs, where the switching sequence is optimized in one dimension.\",\"PeriodicalId\":437349,\"journal\":{\"name\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"volume\":\"90 23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2000.951458\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2000.951458","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

梯度误差可以通过优化DAC阵列的开关顺序来补偿。本文建立了可通过优化开关序列实现的积分非线性的绝对下界。在一元(温度计解码)DAC阵列中,提出了满足该下界的一维线性梯度误差补偿的最佳开关序列。该序列可用于行-列解码电流或电容一元阵列以及r -串dac,其中开关序列在一维上优化。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Optimal switching sequences for one-dimensional linear gradient error compensation in unary DAC arrays
Gradient error can be compensated by optimizing switching sequences of DAC arrays. This paper establishes an absolute lower bound of integral nonlinearity (INL) which may be achieved by optimizing switching sequences. Optimal switching sequences that meet this lower bound are presented for one-dimensional linear gradient error compensation in unary (thermometer decoded) DAC arrays. The sequences can be used in row-column decoded current or capacitor unary arrays as well as R-string DACs, where the switching sequence is optimized in one dimension.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A high speed 3.3V current mode CMOS comparators with 10-b resolution Constraints implementation for IQML and MODE direction-of-arrival estimators A fast electric load forecasting using neural networks Noise reduction in speech signals using a TMS320C31 digital signal processor A high-frequency high-Q CMOS active inductor with DC bias control
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1