SIMD处理器阵列的快速原型(使用FPGA)

D. Andrews, Andrew Wheeler, B. Wealand, C. Kancler
{"title":"SIMD处理器阵列的快速原型(使用FPGA)","authors":"D. Andrews, Andrew Wheeler, B. Wealand, C. Kancler","doi":"10.1109/IWRSP.1994.315912","DOIUrl":null,"url":null,"abstract":"A custom chip set implementing a single instruction multiple data (SIMD) architecture has been designed bringing the benefits of massively parallel processing to the embedded systems domain. A scaled, rapid prototype was first implemented providing an exact duplicate of the functionality and interfaces of the custom chips, but using off the shelf technology. This scaled version was specified to allow development and debugging of software, and provide early feedback for verification of the interfaces and instruction operations. The rapid prototype provides full functionality, allowing any design errors or beneficial modifications to the design to be identified.<<ETX>>","PeriodicalId":261113,"journal":{"name":"Proceedings of IEEE 5th International Workshop on Rapid System Prototyping","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Rapid prototype of an SIMD processor array (using FPGA's)\",\"authors\":\"D. Andrews, Andrew Wheeler, B. Wealand, C. Kancler\",\"doi\":\"10.1109/IWRSP.1994.315912\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A custom chip set implementing a single instruction multiple data (SIMD) architecture has been designed bringing the benefits of massively parallel processing to the embedded systems domain. A scaled, rapid prototype was first implemented providing an exact duplicate of the functionality and interfaces of the custom chips, but using off the shelf technology. This scaled version was specified to allow development and debugging of software, and provide early feedback for verification of the interfaces and instruction operations. The rapid prototype provides full functionality, allowing any design errors or beneficial modifications to the design to be identified.<<ETX>>\",\"PeriodicalId\":261113,\"journal\":{\"name\":\"Proceedings of IEEE 5th International Workshop on Rapid System Prototyping\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-06-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE 5th International Workshop on Rapid System Prototyping\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWRSP.1994.315912\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE 5th International Workshop on Rapid System Prototyping","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWRSP.1994.315912","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

设计了一种实现单指令多数据(SIMD)架构的定制芯片组,将大规模并行处理的优势引入嵌入式系统领域。首先实现了一个缩放的快速原型,提供了定制芯片的功能和接口的精确副本,但使用了现成的技术。这个缩放版本被指定为允许软件的开发和调试,并为接口和指令操作的验证提供早期反馈。快速原型提供了完整的功能,允许识别任何设计错误或对设计进行有益的修改
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Rapid prototype of an SIMD processor array (using FPGA's)
A custom chip set implementing a single instruction multiple data (SIMD) architecture has been designed bringing the benefits of massively parallel processing to the embedded systems domain. A scaled, rapid prototype was first implemented providing an exact duplicate of the functionality and interfaces of the custom chips, but using off the shelf technology. This scaled version was specified to allow development and debugging of software, and provide early feedback for verification of the interfaces and instruction operations. The rapid prototype provides full functionality, allowing any design errors or beneficial modifications to the design to be identified.<>
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ProTR: a tool for real-time systems development Safe rapid prototyping of object-oriented database applications Some design issues in multi-chip FPGA implementation of DSP algorithms Quantitative design of a scalable microsystem using ALMA: the example of the dictionary machine Hardware emulation board based on FPGAs and programmable interconnections
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