FPGA中16位实时堆栈处理器的设计

2005 6th International Conference on ASIC Pub Date : 2005-10-24 DOI:10.1109/ICASIC.2005.1611431

Du Yuyuan

{"title":"FPGA中16位实时堆栈处理器的设计","authors":"Du Yuyuan","doi":"10.1109/ICASIC.2005.1611431","DOIUrl":null,"url":null,"abstract":"The basic structure and features of a 16-bit real time stack processor is introduced. The design and implementation method of the 16-bit stack processor is presented in the paper. The behavioral description and state machine description is applied to program design using VHDL. The 16-bit real time stack processor implemented by Spartan-II XC2S200 FPGA chip, and is successfully adopted in frequency spectrum controller system of MRI","PeriodicalId":431034,"journal":{"name":"2005 6th International Conference on ASIC","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2005-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Design of a 16-bit real time stack processor in FPGA\",\"authors\":\"Du Yuyuan\",\"doi\":\"10.1109/ICASIC.2005.1611431\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The basic structure and features of a 16-bit real time stack processor is introduced. The design and implementation method of the 16-bit stack processor is presented in the paper. The behavioral description and state machine description is applied to program design using VHDL. The 16-bit real time stack processor implemented by Spartan-II XC2S200 FPGA chip, and is successfully adopted in frequency spectrum controller system of MRI\",\"PeriodicalId\":431034,\"journal\":{\"name\":\"2005 6th International Conference on ASIC\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 6th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICASIC.2005.1611431\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 6th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2005.1611431","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 3

摘要

介绍了一种16位实时堆栈处理器的基本结构和特点。本文介绍了16位堆栈处理器的设计与实现方法。将行为描述和状态机描述应用于VHDL语言的程序设计。采用Spartan-II XC2S200 FPGA芯片实现了16位实时堆栈处理器，并成功应用于MRI频谱控制系统中

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Design of a 16-bit real time stack processor in FPGA

The basic structure and features of a 16-bit real time stack processor is introduced. The design and implementation method of the 16-bit stack processor is presented in the paper. The behavioral description and state machine description is applied to program design using VHDL. The 16-bit real time stack processor implemented by Spartan-II XC2S200 FPGA chip, and is successfully adopted in frequency spectrum controller system of MRI

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2005 6th International Conference on ASIC

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