π-模型分布式ESD保护方案优化宽带射频性能及ESD鲁棒性

M. Ker, B. Kuo
{"title":"π-模型分布式ESD保护方案优化宽带射频性能及ESD鲁棒性","authors":"M. Ker, B. Kuo","doi":"10.1109/EOSESD.2004.5272640","DOIUrl":null,"url":null,"abstract":"Large electrostatic discharge (ESD) protection devices close to the I/O pins, beneficial for ESD protection, have an adverse effect on the performance of broadband RF circuits for impedance mismatch and bandwidth degradation. A new proposed ESD protection structure, pi-model distributed ESD (pi-DESD) protection circuit, composed of one pair of ESD devices near the I/O pin, the other pair close to the core circuit, and a coplanar waveguide with under-grounded shield (CPWG) connecting these two pairs, can successfully achieve both excellent ESD robustness and good broadband RF performance. Cooperating with the active power-rail ESD clamp circuit, the experimental chip in a 0.25-mum CMOS process can sustain the human-body-model (HBM) ESD stress of 8 kV.","PeriodicalId":302866,"journal":{"name":"2004 Electrical Overstress/Electrostatic Discharge Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"25","resultStr":"{\"title\":\"Optimization of broadband RF performance and ESD robustness by π-model distributed ESD protection scheme\",\"authors\":\"M. Ker, B. Kuo\",\"doi\":\"10.1109/EOSESD.2004.5272640\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Large electrostatic discharge (ESD) protection devices close to the I/O pins, beneficial for ESD protection, have an adverse effect on the performance of broadband RF circuits for impedance mismatch and bandwidth degradation. A new proposed ESD protection structure, pi-model distributed ESD (pi-DESD) protection circuit, composed of one pair of ESD devices near the I/O pin, the other pair close to the core circuit, and a coplanar waveguide with under-grounded shield (CPWG) connecting these two pairs, can successfully achieve both excellent ESD robustness and good broadband RF performance. Cooperating with the active power-rail ESD clamp circuit, the experimental chip in a 0.25-mum CMOS process can sustain the human-body-model (HBM) ESD stress of 8 kV.\",\"PeriodicalId\":302866,\"journal\":{\"name\":\"2004 Electrical Overstress/Electrostatic Discharge Symposium\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"25\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 Electrical Overstress/Electrostatic Discharge Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EOSESD.2004.5272640\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 Electrical Overstress/Electrostatic Discharge Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EOSESD.2004.5272640","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 25

摘要

靠近I/O引脚的大型静电放电(ESD)保护装置有利于ESD保护,但会导致阻抗失配和带宽退化,对宽带射频电路的性能产生不利影响。提出了一种新的ESD保护结构,即pi型分布式ESD (pi-DESD)保护电路,该电路由一对靠近I/O引脚的ESD器件组成,另一对靠近核心电路,并用带接地屏蔽(CPWG)的共面波导将这两对器件连接起来,可以成功地实现优异的ESD稳健性和良好的宽带射频性能。实验芯片配合有源电源轨ESD箝位电路,在0.25 μ m CMOS工艺下可承受8 kV的人体模型ESD应力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Optimization of broadband RF performance and ESD robustness by π-model distributed ESD protection scheme
Large electrostatic discharge (ESD) protection devices close to the I/O pins, beneficial for ESD protection, have an adverse effect on the performance of broadband RF circuits for impedance mismatch and bandwidth degradation. A new proposed ESD protection structure, pi-model distributed ESD (pi-DESD) protection circuit, composed of one pair of ESD devices near the I/O pin, the other pair close to the core circuit, and a coplanar waveguide with under-grounded shield (CPWG) connecting these two pairs, can successfully achieve both excellent ESD robustness and good broadband RF performance. Cooperating with the active power-rail ESD clamp circuit, the experimental chip in a 0.25-mum CMOS process can sustain the human-body-model (HBM) ESD stress of 8 kV.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Improved wafer-level VFTLP system and investigation of device turn-on effects Wire bonding tip study for extremely ESD sensitive devices Characterizing automated handling equipment using discharge current measurements Study of “hot spots” arising from non-homogeneity in the micro-structures of dissipative materials VF-TLP systems using TDT and TDRT for kelvin wafer measurements and package level testing
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1