{"title":"CMOS开关电容变换器的分析与优化","authors":"V. Sathe, Jae-sun Seo","doi":"10.1109/ISLPED.2015.7273535","DOIUrl":null,"url":null,"abstract":"Energy-efficiency continues to limit peak computational performance in digital systems. To drive continued energy-improvements, designers of modern digital systems are relying on multiple, smaller voltage domains for enhanced voltage-scaling. Switched-capacitor (SC) voltage converters are a promising alternative to traditional switched-inductor regulators due to their suitability for efficient, fully-integrated regulation of finer voltage domains. However, several important problems regarding the analysis and optimization of SC converter design remain unaddressed. This paper develops a comprehensive analysis of SC converter output resistance to establish the optimal switching frequency and switch resistance for maximum converter efficiency. The proposed analysis is validated through simulation experiments conducted using an industrial 65nm CMOS technology.","PeriodicalId":421236,"journal":{"name":"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Analysis and optimization of CMOS switched-capacitor converters\",\"authors\":\"V. Sathe, Jae-sun Seo\",\"doi\":\"10.1109/ISLPED.2015.7273535\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Energy-efficiency continues to limit peak computational performance in digital systems. To drive continued energy-improvements, designers of modern digital systems are relying on multiple, smaller voltage domains for enhanced voltage-scaling. Switched-capacitor (SC) voltage converters are a promising alternative to traditional switched-inductor regulators due to their suitability for efficient, fully-integrated regulation of finer voltage domains. However, several important problems regarding the analysis and optimization of SC converter design remain unaddressed. This paper develops a comprehensive analysis of SC converter output resistance to establish the optimal switching frequency and switch resistance for maximum converter efficiency. The proposed analysis is validated through simulation experiments conducted using an industrial 65nm CMOS technology.\",\"PeriodicalId\":421236,\"journal\":{\"name\":\"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISLPED.2015.7273535\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISLPED.2015.7273535","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis and optimization of CMOS switched-capacitor converters
Energy-efficiency continues to limit peak computational performance in digital systems. To drive continued energy-improvements, designers of modern digital systems are relying on multiple, smaller voltage domains for enhanced voltage-scaling. Switched-capacitor (SC) voltage converters are a promising alternative to traditional switched-inductor regulators due to their suitability for efficient, fully-integrated regulation of finer voltage domains. However, several important problems regarding the analysis and optimization of SC converter design remain unaddressed. This paper develops a comprehensive analysis of SC converter output resistance to establish the optimal switching frequency and switch resistance for maximum converter efficiency. The proposed analysis is validated through simulation experiments conducted using an industrial 65nm CMOS technology.
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