大规模分布式图神经网络的超大规模fpga即服务架构

Shuangchen Li, Dimin Niu, Yuhao Wang, Wei Han, Zhe Zhang, Tianchan Guan, Yijin Guan, Heng Liu, Linyong Huang, Zhaoyang Du, Fei Xue, Yuanwei Fang, Hongzhong Zheng, Yuan Xie
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引用次数: 13

摘要

图神经网络(GNN)在链接预测、推荐等方面是一个很有前途的新兴应用。现有的硬件创新仅限于单机GNN (SM-GNN),而企业通常采用庞大的图和大规模分布式GNN (LSD-GNN),必须使用分布式内存存储来实现。LSD-GNN与SM-GNN在系统架构需求、工作流程和操作人员以及特性方面有很大不同。在本文中,我们首先用工业级框架和应用对LSD-GNN进行了定量表征,总结了它在图采样方面的挑战,包括分布式图访问、长延迟以及未充分利用的通信和内存带宽。这些挑战在以前针对SM-GNN的研究中是缺失的。然后,我们提出了一个定制的硬件架构来解决这些挑战,包括一个用于图形访问和采样的全流水线访问引擎架构,一个低延迟和带宽高效的定制内存结构硬件,以及一个以RISC-V为中心的控制系统,提供良好的可编程性。我们在一个4卡FPGA异构概念验证(PoC)系统中实现了具有完整软件支持的拟议架构。基于FPGA PoC的测量结果,我们证明了单个FPGA可以提供高达894 vCPU的采样能力。为了实现可盈利、可编程和可扩展的目标,我们进一步将该架构集成到超大规模的FPGA云(FaaS)以及工业软件框架中。我们明确地探讨了执行所提议的加速器硬件的八种FaaS架构。我们最后得出结论,现成的FaaS。Base已经可以提供2.47倍的性能与我们的硬件每美元的改进。通过架构优化,带有定制FPGA结构的FaaS.com -opt将优势提高到7.78倍,而FaaS。memo -opt与FPGA本地DRAM和GPU的高速链接进一步释放12.58×的优势。
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Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network
Graph neural network (GNN) is a promising emerging application for link prediction, recommendation, etc. Existing hardware innovation is limited to single-machine GNN (SM-GNN), however, the enterprises usually adopt huge graph with large-scale distributed GNN (LSD-GNN) that has to be carried out with distributed in-memory storage. The LSD-GNN is very different from SM-GNN in terms of system architecture demand, workflow and operators, and hence characterizations. In this paper, we first quantitively characterize the LSD-GNN with industrial-grade framework and application, summarize that its challenges lie in graph sampling, including distributed graph access, long latency, and underutilized communication and memory bandwidth. These challenges are missing from previous SM-GNN targeted researches. We then propose a customized hardware architecture to solve the challenges, including a fully pipelined access engine architecture for graph access and sampling, a low-latency and bandwidth-efficient customized memory-over-fabric hardware, and a RISC-V centric control system providing good programma-bility. We implement the proposed architecture with full software support in a 4-card FPGA heterogeneous proof-of-concept (PoC) system. Based on the measurement result from the FPGA PoC, we demonstrate a single FPGA can provide up to 894 vCPU's sampling capability. With the goal of being profitable, programmable, and scalable, we further integrate the architecture to FPGA cloud (FaaS) at hyperscale, along with the industrial software framework. We explicitly explore eight FaaS architectures that carry out the proposed accelerator hardware. We finally conclude that off-the-shelf FaaS.base can already provide 2.47× performance per dollar improvement with our hardware. With architecture optimizations, FaaS.comm-opt with customized FPGA fabrics pushes the benefit to 7.78×, and FaaS.mem-opt with FPGA local DRAM and high-speed links to GPU further unleash the benefit to 12.58×.
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