基于忆阻器的存储器阵列的容错低功耗多输出读方案研究

Adedotun Adeyemo, J. Mathew, A. Jabir, D. Pradhan
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引用次数: 3

摘要

为了降低新兴内存技术的总体读/写功耗,高效的读/写方案最近引起了越来越多的关注。在这些新兴技术中,基于忆阻器的电阻式随机存取存储器(ReRAM)结构更简单,并且能够通过易于隐蔽路径的交叉栅结构产生高密度存储器。本文考虑了一种多单元读取方案,以减少从存储器阵列读取时的总能耗。推导了噪声裕度效应的封闭表达式,分析表明,在感知存储数据的某些模式时,存在零潜径。因此,多单元读出方法被用于分析一种节能的倒汉明(I-H)架构,该架构能够检测和纠正基于忆阻器的存储阵列中的单比特写入错误。
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Exploring error-tolerant low-power multiple-output read scheme for memristor-based memory arrays
In an effort to reduce the overall read/write power consumption in emerging memory technologies, efficient read/write schemes have recently attracted increased attention. Among these emerging technologies is the memristor-based resistive random access memory (ReRAM) with simpler structures and capability of producing highly dense memory through the sneak-path prone crossbar architecture. In this paper, a multiple-cells read solution to reduce the overall energy consumption when reading from a memory array is considered. A closed form expression for the noise margin effect is derived and analysis shows that there is zero sneak-path when sensing certain patterns of stored data. The multiple-cells readout method was thus used to analyse an energy efficient Inverted-Hamming (I-H) architecture capable of detecting and correcting single-bit write error in memristor-based memory array.
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