热收支对掺杂剂偏析(DS)金属S/D栅极全能(GAA) pfet的影响

Proceedings of Technical Program of 2012 VLSI Technology, System and Application Pub Date : 2012-04-23 DOI:10.1109/VLSI-TSA.2012.6210131

K. Akarvardar, M. Rodgers, V. Kaushik, C. Johnson, I. Ok, K. Ang, H. Stamper, S. Bennett, D. Franca, M. Rao, S. Gausepohl, C. Hobbs, P. Kirsch, R. Jammy

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摘要

制备了低温(栅极堆叠后T≤480C) DS Metal S/D GAA pfet，并对S/D活化退火(SDAA)器件进行了基准测试。结果表明，当DS注入在栅极间隔层形成之前，没有SDAA的器件具有更高的峰值Gm和IDsat，但Ioff也高于SDAA器件。采用TiN/HfO2栅极和NiPtSi S/D制备的低热预算GAA pfet实现了IDsat = 0.8 mA/um和Ion/Ioff >;2000适用于VGS = -1.5 V, VDS = -1 V，纳米线长度为100nm。

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Impact of thermal budget on dopant-segregated (DS) metal S/D gate-all-around (GAA) PFETs

Low temperature (T ≤ 480C after gate stack) DS Metal S/D GAA PFETs were fabricated and benchmarked to devices with S/D activation anneal (SDAA). It is shown that when DS implantation precedes gate spacer formation, devices without SDAA have higher peak G_m and I_Dsat, however also higher I_off than their counterparts with SDAA. Fabricated low-thermal-budget GAA PFETs with TiN/HfO₂ gate and NiPtSi S/D achieve I_Dsat = 0.8 mA/um and I_on/I_off >; 2000 for VGS = -1.5 V, V_DS = -1 V, and 100 nm nanowire length.

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Proceedings of Technical Program of 2012 VLSI Technology, System and Application

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