{"title":"时序电路多卡断故障的伪穷举测试","authors":"A. Matrosova, E. Mitrofanov","doi":"10.1109/EWDTS.2016.7807694","DOIUrl":null,"url":null,"abstract":"A Sequential circuit design is based on using mixed description of a behavior of a combinational part. The behavior is represented with a composition of ROBDDs and monotonous products. The design method provides fully delay testability of a combinational part of a sequential circuit. In this paper it is shown that the method also provides multiple stuck-at faults testability of a combinational part. The pseudo-exhaustive test consisting of two parts is developed. One part is used to test sub-circuits obtained by covering nodes of the proper ROBDDs by elementary circuits (Invert-AND-XOR circuits). It allows detecting multiple stuck-at faults at gate poles of elementary circuits evenly remote from the combinational part inputs. The second test part detects all multiple stuck-at faults at gate poles of the rest component of the combinational part. It is supposed that only one of these two components of a combinational part may be faulty. An estimation of the length of such test is given.","PeriodicalId":364686,"journal":{"name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Pseudo-exhaustive testing of sequential circuits for multiple stuck-at faults\",\"authors\":\"A. Matrosova, E. Mitrofanov\",\"doi\":\"10.1109/EWDTS.2016.7807694\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A Sequential circuit design is based on using mixed description of a behavior of a combinational part. The behavior is represented with a composition of ROBDDs and monotonous products. The design method provides fully delay testability of a combinational part of a sequential circuit. In this paper it is shown that the method also provides multiple stuck-at faults testability of a combinational part. The pseudo-exhaustive test consisting of two parts is developed. One part is used to test sub-circuits obtained by covering nodes of the proper ROBDDs by elementary circuits (Invert-AND-XOR circuits). It allows detecting multiple stuck-at faults at gate poles of elementary circuits evenly remote from the combinational part inputs. The second test part detects all multiple stuck-at faults at gate poles of the rest component of the combinational part. It is supposed that only one of these two components of a combinational part may be faulty. An estimation of the length of such test is given.\",\"PeriodicalId\":364686,\"journal\":{\"name\":\"2016 IEEE East-West Design & Test Symposium (EWDTS)\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE East-West Design & Test Symposium (EWDTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EWDTS.2016.7807694\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE East-West Design & Test Symposium (EWDTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWDTS.2016.7807694","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Pseudo-exhaustive testing of sequential circuits for multiple stuck-at faults
A Sequential circuit design is based on using mixed description of a behavior of a combinational part. The behavior is represented with a composition of ROBDDs and monotonous products. The design method provides fully delay testability of a combinational part of a sequential circuit. In this paper it is shown that the method also provides multiple stuck-at faults testability of a combinational part. The pseudo-exhaustive test consisting of two parts is developed. One part is used to test sub-circuits obtained by covering nodes of the proper ROBDDs by elementary circuits (Invert-AND-XOR circuits). It allows detecting multiple stuck-at faults at gate poles of elementary circuits evenly remote from the combinational part inputs. The second test part detects all multiple stuck-at faults at gate poles of the rest component of the combinational part. It is supposed that only one of these two components of a combinational part may be faulty. An estimation of the length of such test is given.