{"title":"8mW超低功耗60GHz直接转换接收机，增益55dB，噪声系数4.9dB，采用65nm CMOS","authors":"Y. Shang, Deyun Cai, Wei Fei, Hao Yu, Junyan Ren","doi":"10.1109/RFIT.2012.6401609","DOIUrl":null,"url":null,"abstract":"An ultra low power direct-conversion receiver is demonstrated for V-band 60GHz applications in 65nm CMOS process. The power consumption is significantly reduced by the design of low-power low noise amplifier (LNA), transconductance mixer and variable gain amplifier (VGA). A compact quadrature-hybrid coupler is developed for transconductance mixer for the reduction of both power and area. The proposed receiver (0.34mm2 chip area) is measured with 8mW power, the minimum single-side-band (SSB) noise figure (NF) of 4.9dB, and the maximum power conversion gain of 55dB.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"An 8mW ultra low power 60GHz direct-conversion receiver with 55dB gain and 4.9dB noise figure in 65nm CMOS\",\"authors\":\"Y. Shang, Deyun Cai, Wei Fei, Hao Yu, Junyan Ren\",\"doi\":\"10.1109/RFIT.2012.6401609\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An ultra low power direct-conversion receiver is demonstrated for V-band 60GHz applications in 65nm CMOS process. The power consumption is significantly reduced by the design of low-power low noise amplifier (LNA), transconductance mixer and variable gain amplifier (VGA). A compact quadrature-hybrid coupler is developed for transconductance mixer for the reduction of both power and area. The proposed receiver (0.34mm2 chip area) is measured with 8mW power, the minimum single-side-band (SSB) noise figure (NF) of 4.9dB, and the maximum power conversion gain of 55dB.\",\"PeriodicalId\":187550,\"journal\":{\"name\":\"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIT.2012.6401609\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2012.6401609","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An 8mW ultra low power 60GHz direct-conversion receiver with 55dB gain and 4.9dB noise figure in 65nm CMOS
An ultra low power direct-conversion receiver is demonstrated for V-band 60GHz applications in 65nm CMOS process. The power consumption is significantly reduced by the design of low-power low noise amplifier (LNA), transconductance mixer and variable gain amplifier (VGA). A compact quadrature-hybrid coupler is developed for transconductance mixer for the reduction of both power and area. The proposed receiver (0.34mm2 chip area) is measured with 8mW power, the minimum single-side-band (SSB) noise figure (NF) of 4.9dB, and the maximum power conversion gain of 55dB.
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