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引用次数: 23
摘要
我们提出了用于鲁棒数字亚阈值设计的过程变化容忍电路技术。我们提出了一种8times8进程容忍FIR滤波器，工作在超阈值和亚阈值区域，具有自适应β -比率调制和集成电平转换器。超动态电压缩放(UVDS)使滤波器工作在85 mV消耗40 nW。对于存储应用，我们提出了基于施密特触发器的SRAM位单元，具有内置的进程变化容忍度。在0.13 μ m CMOS技术下，在160 mV下演示了具有所提出的存储位单元的功能SRAM。
Process-Tolerant Ultralow Voltage Digital Subthreshold Design
We propose process variation tolerant circuit techniques for robust digital subthreshold design. We present an 8times8 process-tolerant FIR filter, working in both super-threshold and subthreshold regions featuring adaptive beta-ratio modulation and integrated level converters. Ultra-dynamic voltage scaling (UVDS) enables the filter operation at 85 mV consuming 40 nW. For memory applications, we propose Schmitt trigger based SRAM bitcell exhibiting built-in process variation tolerance. Functional SRAM with the proposed memory bitcell is demonstrated at 160 mV in 0.13 mum CMOS technology.
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