Radix-4 successive cancellation decoding of polar codes with partial sum lookahead

Polar codes have been proposed recently as proven to asymptotically achieve channel capacity for memoryless channels. However, realization of high throughput decoders for large code lengths remains a daunting challenge due to the successive decoding behaviour. With the help of using radix-4 processing units, a special last stage processing unit to decode 4 bits in the same clock and partial sum look ahead technique, this paper proposes a high throughput decoder architecture, which considerably reduces the latency compared to state of the art implementations.