切伦科夫望远镜用高速模拟存储器集成电路

C. Chitu, W. Hofmann
{"title":"切伦科夫望远镜用高速模拟存储器集成电路","authors":"C. Chitu, W. Hofmann","doi":"10.1109/APASIC.1999.824097","DOIUrl":null,"url":null,"abstract":"A switched capacitor analog memory circuit for capturing fast signals from Cherenkov telescopes is described. A four channel version of the memory with 128 cells in each channel has been integrated in a 0.8 /spl mu/m complementary metal oxide semiconductor (CMOS) process with poly-to-poly capacitors. The sampling frequency generated on chip is 500 MHz and the readout frequency is 100 kHz. The measured rms cell pedestal variation in a channel after baseline subtraction is less than 10 mV across the full input signal range. The cell-to-cell gain matching is better than 1% rms, and the nonlinearity is less than 1.3% for a 1.5 V input range. The dynamic range of the memory exceeds 8 bits for a 1.5 V input voltage range.","PeriodicalId":346808,"journal":{"name":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"High speed analog memory integrated circuit for Cherenkov telescopes\",\"authors\":\"C. Chitu, W. Hofmann\",\"doi\":\"10.1109/APASIC.1999.824097\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A switched capacitor analog memory circuit for capturing fast signals from Cherenkov telescopes is described. A four channel version of the memory with 128 cells in each channel has been integrated in a 0.8 /spl mu/m complementary metal oxide semiconductor (CMOS) process with poly-to-poly capacitors. The sampling frequency generated on chip is 500 MHz and the readout frequency is 100 kHz. The measured rms cell pedestal variation in a channel after baseline subtraction is less than 10 mV across the full input signal range. The cell-to-cell gain matching is better than 1% rms, and the nonlinearity is less than 1.3% for a 1.5 V input range. The dynamic range of the memory exceeds 8 bits for a 1.5 V input voltage range.\",\"PeriodicalId\":346808,\"journal\":{\"name\":\"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-08-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APASIC.1999.824097\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.1999.824097","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

描述了一种用于捕获切伦科夫望远镜快速信号的开关电容模拟存储电路。该存储器的四通道版本,每个通道中有128个单元,已集成在0.8 /spl mu/m的互补金属氧化物半导体(CMOS)工艺中,具有多对多电容器。芯片上产生的采样频率为500mhz,读出频率为100khz。在整个输入信号范围内,基线减法后通道中测量到的均方根单元基座变化小于10mv。在1.5 V输入范围内,单元间增益匹配优于1%有效值,非线性小于1.3%。在1.5 V的输入电压范围内,存储器的动态范围超过8位。
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High speed analog memory integrated circuit for Cherenkov telescopes
A switched capacitor analog memory circuit for capturing fast signals from Cherenkov telescopes is described. A four channel version of the memory with 128 cells in each channel has been integrated in a 0.8 /spl mu/m complementary metal oxide semiconductor (CMOS) process with poly-to-poly capacitors. The sampling frequency generated on chip is 500 MHz and the readout frequency is 100 kHz. The measured rms cell pedestal variation in a channel after baseline subtraction is less than 10 mV across the full input signal range. The cell-to-cell gain matching is better than 1% rms, and the nonlinearity is less than 1.3% for a 1.5 V input range. The dynamic range of the memory exceeds 8 bits for a 1.5 V input voltage range.
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