A routing concept for large sea-of-gates designs

Sea-of-gates (SoG) is becoming a very important design style for ASICs. Due to a larger flexibility in placement and routing, SoG can achieve higher densities and gate count than conventional gate arrays. Ion this paper the authors describe a routing environment and a routing methodology utilizing all features of this new design style, aiming to automatically complete a large design with high gate utilization, zero uncompleted routing connections with reasonable CPU-resources. In general, this problem cannot be solved with a single algorithm. Rather, a sequence of algorithms which are hierarchical and/or optimized to perform specialized tasks are used.<>