{"title":"用于模拟仿真的晶体管内部结特性的获取","authors":"S. Geller","doi":"10.1109/TEC.1962.5219438","DOIUrl":null,"url":null,"abstract":"A technique is described for making the internal base-to-emitter junction characteristics of an alloy junction transistor available to an analog computer simulation process. This is accomplished with an active feedback network that continuously compensates for the internal voltage drop across the extrinsic base-spreading resistance at all base current levels.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1962-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Obtaining the Internal Junction Characteristics of a Transistor for Use in Analog Simulation\",\"authors\":\"S. Geller\",\"doi\":\"10.1109/TEC.1962.5219438\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A technique is described for making the internal base-to-emitter junction characteristics of an alloy junction transistor available to an analog computer simulation process. This is accomplished with an active feedback network that continuously compensates for the internal voltage drop across the extrinsic base-spreading resistance at all base current levels.\",\"PeriodicalId\":177496,\"journal\":{\"name\":\"IRE Trans. Electron. Comput.\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1962-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IRE Trans. Electron. Comput.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEC.1962.5219438\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IRE Trans. Electron. Comput.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEC.1962.5219438","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Obtaining the Internal Junction Characteristics of a Transistor for Use in Analog Simulation
A technique is described for making the internal base-to-emitter junction characteristics of an alloy junction transistor available to an analog computer simulation process. This is accomplished with an active feedback network that continuously compensates for the internal voltage drop across the extrinsic base-spreading resistance at all base current levels.