{"title":"叠模器件中电阻性短路的案例研究","authors":"Ke-Ying Lin, Yu Chi Wang","doi":"10.1109/IPFA.2018.8452603","DOIUrl":null,"url":null,"abstract":"A resistive short IV curve was detected in a stacked-die device after a highly accelerated stress test (HAST). Lock-in thermography (LIT), a non-destructive fault isolation technique, was applied to localize the fault location in the top die of the intact package. Thereafter, backside sample preparation and physical failure analysis (PFA) were performed and revealed the die crack issue causing the fault.","PeriodicalId":382811,"journal":{"name":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Case Study of a Resistive Short in a Stacked-Die Device\",\"authors\":\"Ke-Ying Lin, Yu Chi Wang\",\"doi\":\"10.1109/IPFA.2018.8452603\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A resistive short IV curve was detected in a stacked-die device after a highly accelerated stress test (HAST). Lock-in thermography (LIT), a non-destructive fault isolation technique, was applied to localize the fault location in the top die of the intact package. Thereafter, backside sample preparation and physical failure analysis (PFA) were performed and revealed the die crack issue causing the fault.\",\"PeriodicalId\":382811,\"journal\":{\"name\":\"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2018.8452603\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2018.8452603","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Case Study of a Resistive Short in a Stacked-Die Device
A resistive short IV curve was detected in a stacked-die device after a highly accelerated stress test (HAST). Lock-in thermography (LIT), a non-destructive fault isolation technique, was applied to localize the fault location in the top die of the intact package. Thereafter, backside sample preparation and physical failure analysis (PFA) were performed and revealed the die crack issue causing the fault.