{"title":"绝缘体上硅的三态量子点门场效应晶体管","authors":"S. Karmakar, M. Gogna, E. Suarez, F. Jain","doi":"10.1049/iet-cds.2014.0202","DOIUrl":null,"url":null,"abstract":"This paper presents the observation of intermediate state in the quantum dot gate field-effect transistors (QDGFETs) in silicon-on-insulator (SOI) substrate. Silicon dioxide (SiO2)-cladded silicon (Si) quantum dots (QDs) are site-specifically self-assembled on the top of SiO2 tunnel gate insulator on SOI substrates. Charge carrier tunnelling from the inversion channel to the QD layers on top of the gate insulator is responsible for the generation of intermediate state. Charge tunnelling is also verified by the C–V characteristics of the MOS device having same insulator structure as the gate region of the QDGFET. Considering the transfer of charge carriers from the inversion channel to two layers of SiO2-cladded Si QDs, a model based on self-consistent solution of Schrodinger and Poisson equations, is also presented, to explain the generation of intermediate state.","PeriodicalId":120076,"journal":{"name":"IET Circuits Devices Syst.","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"Three-state quantum dot gate field-effect transistor in silicon-on-insulator\",\"authors\":\"S. Karmakar, M. Gogna, E. Suarez, F. Jain\",\"doi\":\"10.1049/iet-cds.2014.0202\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the observation of intermediate state in the quantum dot gate field-effect transistors (QDGFETs) in silicon-on-insulator (SOI) substrate. Silicon dioxide (SiO2)-cladded silicon (Si) quantum dots (QDs) are site-specifically self-assembled on the top of SiO2 tunnel gate insulator on SOI substrates. Charge carrier tunnelling from the inversion channel to the QD layers on top of the gate insulator is responsible for the generation of intermediate state. Charge tunnelling is also verified by the C–V characteristics of the MOS device having same insulator structure as the gate region of the QDGFET. Considering the transfer of charge carriers from the inversion channel to two layers of SiO2-cladded Si QDs, a model based on self-consistent solution of Schrodinger and Poisson equations, is also presented, to explain the generation of intermediate state.\",\"PeriodicalId\":120076,\"journal\":{\"name\":\"IET Circuits Devices Syst.\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-04-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IET Circuits Devices Syst.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/iet-cds.2014.0202\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IET Circuits Devices Syst.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/iet-cds.2014.0202","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Three-state quantum dot gate field-effect transistor in silicon-on-insulator
This paper presents the observation of intermediate state in the quantum dot gate field-effect transistors (QDGFETs) in silicon-on-insulator (SOI) substrate. Silicon dioxide (SiO2)-cladded silicon (Si) quantum dots (QDs) are site-specifically self-assembled on the top of SiO2 tunnel gate insulator on SOI substrates. Charge carrier tunnelling from the inversion channel to the QD layers on top of the gate insulator is responsible for the generation of intermediate state. Charge tunnelling is also verified by the C–V characteristics of the MOS device having same insulator structure as the gate region of the QDGFET. Considering the transfer of charge carriers from the inversion channel to two layers of SiO2-cladded Si QDs, a model based on self-consistent solution of Schrodinger and Poisson equations, is also presented, to explain the generation of intermediate state.