{"title":"基于FPGA的多核存储体系结构研究","authors":"Seiya Shirakuni, Ittetsu Taniguchi, H. Tomiyama","doi":"10.1109/CANDARW.2018.00032","DOIUrl":null,"url":null,"abstract":"Due to the advances in semiconductor technologies, a recent FPGA device is capable of implementing a number of CPU cores, and manycore architecture on an FPGA attracts an increasing attention in the design of high-performance embedded systems. In embedded system design with FPGA-based manycore architectures, it is important to optimize not only the number and topology of cores but also memory architecture for each application in order to achieve high performance under limited FPGA resources. This paper presents a case study on memory architecture exploration for manycores on an FPGA. We design and implement three types of manycore architecture, together with an OpenCL-based software framework. The performance of the three architectures is evaluated based on actual measurement using various application programs.","PeriodicalId":329439,"journal":{"name":"2018 Sixth International Symposium on Computing and Networking Workshops (CANDARW)","volume":"124 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Case Study on Memory Architecture Exploration for Manycores on an FPGA\",\"authors\":\"Seiya Shirakuni, Ittetsu Taniguchi, H. Tomiyama\",\"doi\":\"10.1109/CANDARW.2018.00032\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Due to the advances in semiconductor technologies, a recent FPGA device is capable of implementing a number of CPU cores, and manycore architecture on an FPGA attracts an increasing attention in the design of high-performance embedded systems. In embedded system design with FPGA-based manycore architectures, it is important to optimize not only the number and topology of cores but also memory architecture for each application in order to achieve high performance under limited FPGA resources. This paper presents a case study on memory architecture exploration for manycores on an FPGA. We design and implement three types of manycore architecture, together with an OpenCL-based software framework. The performance of the three architectures is evaluated based on actual measurement using various application programs.\",\"PeriodicalId\":329439,\"journal\":{\"name\":\"2018 Sixth International Symposium on Computing and Networking Workshops (CANDARW)\",\"volume\":\"124 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 Sixth International Symposium on Computing and Networking Workshops (CANDARW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CANDARW.2018.00032\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 Sixth International Symposium on Computing and Networking Workshops (CANDARW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CANDARW.2018.00032","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Case Study on Memory Architecture Exploration for Manycores on an FPGA
Due to the advances in semiconductor technologies, a recent FPGA device is capable of implementing a number of CPU cores, and manycore architecture on an FPGA attracts an increasing attention in the design of high-performance embedded systems. In embedded system design with FPGA-based manycore architectures, it is important to optimize not only the number and topology of cores but also memory architecture for each application in order to achieve high performance under limited FPGA resources. This paper presents a case study on memory architecture exploration for manycores on an FPGA. We design and implement three types of manycore architecture, together with an OpenCL-based software framework. The performance of the three architectures is evaluated based on actual measurement using various application programs.