{"title":"采用0.13 μm CMOS技术的30-GS/秒跟踪保持放大器","authors":"S. Shahramian, S. Voinigescu, A. C. Carusone","doi":"10.1109/CICC.2006.320891","DOIUrl":null,"url":null,"abstract":"A 30-GS/sec CMOS track and hold amplifier (THA) is designed and fabricated in a 0.13-μm technology. The chip operates from a 1.8-V supply and consumes 270 mW. The THA employs a low noise TIA input stage and a switched source follower (SSF) track and hold block. The SSF topology overcomes the shortcomings of switched series transistors by eliminating the use of a series switch all together. The measured single-ended S-parameters show an input and output return loss of better than -10 dB up to 35 GHz and 7 GHz of bandwidth when the circuit is operated in track mode. The measured total harmonic distortion of the THA is better than -29 dB.","PeriodicalId":269854,"journal":{"name":"IEEE Custom Integrated Circuits Conference 2006","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"55","resultStr":"{\"title\":\"A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology\",\"authors\":\"S. Shahramian, S. Voinigescu, A. C. Carusone\",\"doi\":\"10.1109/CICC.2006.320891\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 30-GS/sec CMOS track and hold amplifier (THA) is designed and fabricated in a 0.13-μm technology. The chip operates from a 1.8-V supply and consumes 270 mW. The THA employs a low noise TIA input stage and a switched source follower (SSF) track and hold block. The SSF topology overcomes the shortcomings of switched series transistors by eliminating the use of a series switch all together. The measured single-ended S-parameters show an input and output return loss of better than -10 dB up to 35 GHz and 7 GHz of bandwidth when the circuit is operated in track mode. The measured total harmonic distortion of the THA is better than -29 dB.\",\"PeriodicalId\":269854,\"journal\":{\"name\":\"IEEE Custom Integrated Circuits Conference 2006\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"55\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Custom Integrated Circuits Conference 2006\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2006.320891\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Custom Integrated Circuits Conference 2006","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2006.320891","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 30-GS/sec Track and Hold Amplifier in 0.13-μm CMOS Technology
A 30-GS/sec CMOS track and hold amplifier (THA) is designed and fabricated in a 0.13-μm technology. The chip operates from a 1.8-V supply and consumes 270 mW. The THA employs a low noise TIA input stage and a switched source follower (SSF) track and hold block. The SSF topology overcomes the shortcomings of switched series transistors by eliminating the use of a series switch all together. The measured single-ended S-parameters show an input and output return loss of better than -10 dB up to 35 GHz and 7 GHz of bandwidth when the circuit is operated in track mode. The measured total harmonic distortion of the THA is better than -29 dB.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
