混合信号CMOS集成电路中键合和封装串扰的计算机模拟方法

G. Trucco, G. Boselli, V. Liberali
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引用次数: 8

摘要

本文提出了一种混合模数CMOS集成电路的仿真方法,旨在估计由电压源产生的电流脉冲引起的串扰效应。推导了CMOS逻辑门上拉和下拉时电压和电流的简单表达式,通过专用的计算机程序可以很容易地计算出数字开关噪声的时域表示。此表示用于使用SPICE进行模拟模拟,以评估开关噪声通过封装和键合线的寄生元件的传播。给出了两个实例的仿真结果。
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An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage supplies. A simple expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate is derived, and a representation of digital switching noise in time domain can be easily calculated through a dedicated computer program. This representation is used to perform an analog simulation using SPICE, to evaluate the propagation of the switching noise through the parasitic elements of the package and of the bonding wires. Simulation results for two case studies are presented.
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