{"title":"混合信号CMOS集成电路中键合和封装串扰的计算机模拟方法","authors":"G. Trucco, G. Boselli, V. Liberali","doi":"10.1145/1016568.1016606","DOIUrl":null,"url":null,"abstract":"This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage supplies. A simple expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate is derived, and a representation of digital switching noise in time domain can be easily calculated through a dedicated computer program. This representation is used to perform an analog simulation using SPICE, to evaluate the propagation of the switching noise through the parasitic elements of the package and of the bonding wires. Simulation results for two case studies are presented.","PeriodicalId":275811,"journal":{"name":"Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs\",\"authors\":\"G. Trucco, G. Boselli, V. Liberali\",\"doi\":\"10.1145/1016568.1016606\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage supplies. A simple expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate is derived, and a representation of digital switching noise in time domain can be easily calculated through a dedicated computer program. This representation is used to perform an analog simulation using SPICE, to evaluate the propagation of the switching noise through the parasitic elements of the package and of the bonding wires. Simulation results for two case studies are presented.\",\"PeriodicalId\":275811,\"journal\":{\"name\":\"Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-09-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/1016568.1016606\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. SBCCI 2004. 17th Symposium on Integrated Circuits and Systems Design (IEEE Cat. No.04TH8784)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/1016568.1016606","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An approach to computer simulation of bonding and package crosstalk in mixed-signal CMOS ICs
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage supplies. A simple expression of voltage and current in the pull-up and the pull-down of a CMOS logic gate is derived, and a representation of digital switching noise in time domain can be easily calculated through a dedicated computer program. This representation is used to perform an analog simulation using SPICE, to evaluate the propagation of the switching noise through the parasitic elements of the package and of the bonding wires. Simulation results for two case studies are presented.