CMOS Analog Four-Quadrant Multiplier Free of Voltage Reference Generators

This work presents a CMOS four quadrant analog multiplier architecture for application as the synapse element in analog cellular neural networks. The circuit has voltage-mode inputs and a current-mode output and includes a signal application method that avoids voltage or current reference generators. Simulations have been accomplished for a CMOS 130 nm technology, featuring $\pm 50\ \mathrm{mV}$ input voltage range, $60\ \mu\mathrm{W}$ static power and −25 dB maximum THD. The active area is $346\ \mu\mathrm{m}^{2}$.