{"title":"介绍相位噪声和抖动","authors":"W. Bae, D. Jeong","doi":"10.1049/pbcs059e_ch2","DOIUrl":null,"url":null,"abstract":"In this chapter, we start by defming time interval error (TIE), period jitter, and cycle -to -cycle jitter. Figure 2.1 shows the definitions of TIE, period jitter, and cycle -to -cycle jitter of a clock signal. TIE also has many different titles such as edge-to-edge jitter, time interval jitter, absolute jitter, phase jitter, or just jitter. TIE is defined as the absolute difference in the position of a clock's edge from the ideally exact position. Therefore, the ideal positions must be known or estimated to calculate TIE. On the other hand, the period jitter and cycle-to-cycle jitter do not need the ideal positions to be calculated. The period jitter, which is also called as cycle jitter, means the difference between any one measured clock period and the ideal clock period [3]. Although the period jitter definition refers to the ideal clock, its root of mean square (RMS) and peak -to -peak values are calculated statistically regardless of the ideal clock period.","PeriodicalId":357134,"journal":{"name":"Analysis and Design of CMOS Clocking Circuits for Low Phase Noise","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Introduction to phase noise and jitter\",\"authors\":\"W. Bae, D. Jeong\",\"doi\":\"10.1049/pbcs059e_ch2\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this chapter, we start by defming time interval error (TIE), period jitter, and cycle -to -cycle jitter. Figure 2.1 shows the definitions of TIE, period jitter, and cycle -to -cycle jitter of a clock signal. TIE also has many different titles such as edge-to-edge jitter, time interval jitter, absolute jitter, phase jitter, or just jitter. TIE is defined as the absolute difference in the position of a clock's edge from the ideally exact position. Therefore, the ideal positions must be known or estimated to calculate TIE. On the other hand, the period jitter and cycle-to-cycle jitter do not need the ideal positions to be calculated. The period jitter, which is also called as cycle jitter, means the difference between any one measured clock period and the ideal clock period [3]. Although the period jitter definition refers to the ideal clock, its root of mean square (RMS) and peak -to -peak values are calculated statistically regardless of the ideal clock period.\",\"PeriodicalId\":357134,\"journal\":{\"name\":\"Analysis and Design of CMOS Clocking Circuits for Low Phase Noise\",\"volume\":\"122 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Analysis and Design of CMOS Clocking Circuits for Low Phase Noise\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/pbcs059e_ch2\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analysis and Design of CMOS Clocking Circuits for Low Phase Noise","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/pbcs059e_ch2","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
In this chapter, we start by defming time interval error (TIE), period jitter, and cycle -to -cycle jitter. Figure 2.1 shows the definitions of TIE, period jitter, and cycle -to -cycle jitter of a clock signal. TIE also has many different titles such as edge-to-edge jitter, time interval jitter, absolute jitter, phase jitter, or just jitter. TIE is defined as the absolute difference in the position of a clock's edge from the ideally exact position. Therefore, the ideal positions must be known or estimated to calculate TIE. On the other hand, the period jitter and cycle-to-cycle jitter do not need the ideal positions to be calculated. The period jitter, which is also called as cycle jitter, means the difference between any one measured clock period and the ideal clock period [3]. Although the period jitter definition refers to the ideal clock, its root of mean square (RMS) and peak -to -peak values are calculated statistically regardless of the ideal clock period.