{"title":"用于WLAN和蓝牙应用的CMOS e类功率放大器的设计","authors":"P. Manikandan, R. Mathew","doi":"10.1109/ICDCSYST.2012.6188679","DOIUrl":null,"url":null,"abstract":"A class-E power amplifier with modified driver for WLAN and Bluetooth applications is presented in this paper. It is shown that a parallel class-E power amplifier gives better output power at minimum input power levels compared to a conventional class-E power amplifier. A new modified driver stage is proposed which drives the power amplifier efficiently. Negative capacitance concept is implemented to reduce parasitic capacitances at the driver output node to shape the driver output voltage. The negative capacitance is implemented without external circuit and the driver circuit is fed with less than 5dBm input power at 2.4GHz operating frequency. The power amplifier gain is more than 20dBm with 40% PAE at 2.4GHz. The power amplifier and the modified driver circuitry were implemented in 0.18-μm UMC CMOS technology using Cadence tool.","PeriodicalId":356188,"journal":{"name":"2012 International Conference on Devices, Circuits and Systems (ICDCS)","volume":"127 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Design of CMOS class-E power amplifier for WLAN and bluetooth applications\",\"authors\":\"P. Manikandan, R. Mathew\",\"doi\":\"10.1109/ICDCSYST.2012.6188679\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A class-E power amplifier with modified driver for WLAN and Bluetooth applications is presented in this paper. It is shown that a parallel class-E power amplifier gives better output power at minimum input power levels compared to a conventional class-E power amplifier. A new modified driver stage is proposed which drives the power amplifier efficiently. Negative capacitance concept is implemented to reduce parasitic capacitances at the driver output node to shape the driver output voltage. The negative capacitance is implemented without external circuit and the driver circuit is fed with less than 5dBm input power at 2.4GHz operating frequency. The power amplifier gain is more than 20dBm with 40% PAE at 2.4GHz. The power amplifier and the modified driver circuitry were implemented in 0.18-μm UMC CMOS technology using Cadence tool.\",\"PeriodicalId\":356188,\"journal\":{\"name\":\"2012 International Conference on Devices, Circuits and Systems (ICDCS)\",\"volume\":\"127 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 International Conference on Devices, Circuits and Systems (ICDCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICDCSYST.2012.6188679\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 International Conference on Devices, Circuits and Systems (ICDCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICDCSYST.2012.6188679","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of CMOS class-E power amplifier for WLAN and bluetooth applications
A class-E power amplifier with modified driver for WLAN and Bluetooth applications is presented in this paper. It is shown that a parallel class-E power amplifier gives better output power at minimum input power levels compared to a conventional class-E power amplifier. A new modified driver stage is proposed which drives the power amplifier efficiently. Negative capacitance concept is implemented to reduce parasitic capacitances at the driver output node to shape the driver output voltage. The negative capacitance is implemented without external circuit and the driver circuit is fed with less than 5dBm input power at 2.4GHz operating frequency. The power amplifier gain is more than 20dBm with 40% PAE at 2.4GHz. The power amplifier and the modified driver circuitry were implemented in 0.18-μm UMC CMOS technology using Cadence tool.
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