Analysis and modelling of non-idealities in high frequency class D amplifier

The effect of non-idealities of a high frequency class D amplifier on it's output voltage is analysed. Firstly individual non-idealities like dead time, MOSFET body-diode drop, MOSFET ON-State drop, finite turn-on and turn-off time, series resistance of inductor and capacitor of output stage filter are taken one at a time and their effect on output voltage is analysed. Then effect of all of these non-idealities and their inter-dependencies are analysed for all load conditions. A mathematical model considering the non-idealities to calculate the output voltage is derived. Also, a simple circuit model for an approximate analysis of practical class D amplifier with all non-idealities is derived. The error in the output voltage of the H-bridge for a sinusoidal input signal is numerically simulated. The model is then verified by simulation and hardware based experiments. A closed loop class D amplifier is developed which reduces the output voltage error by 78%.