低温,细间距互连使用自模式金属纳米颗粒作为键合层

G. Mehrotra, G. Jha, J. Goud, P. Raj, M. Venkatesan, M. Iyer, D. Hess, R. Tummala
{"title":"低温,细间距互连使用自模式金属纳米颗粒作为键合层","authors":"G. Mehrotra, G. Jha, J. Goud, P. Raj, M. Venkatesan, M. Iyer, D. Hess, R. Tummala","doi":"10.1109/ECTC.2008.4550162","DOIUrl":null,"url":null,"abstract":"High speed digital and mixed signal applications are driving short and more reliable fine pitch interconnection with higher I/O count in 3D architectures. Thin film die to wafer and wafer to wafer bonding with copper-based interconnections have several benefits in terms of low cost, process compatibility with semiconductor infrastructure, and the shortest interconnection with the best electrical performance. However, the bonding is accomplished at around 400 C, with pressures exceeding 30 N/cm2 which may not be compatible with thinned dies, and in ultrahigh vacuum and cleanroom environments with careful copper oxide cleaning procedures. The bonding time is typically 1 hour, which also limits the throughput. The process windows are relatively narrow with several temperature compatibility issues. This paper deals with low temperature bonding process using high surface energy metallic nanoparticles such as copper and gold. Bonding is enhanced by accelerated diffusion kinetics. Self patterning technique has also been developed to assist fine pitch bonding. This is based on selective wetting or selective deposition of nanoparticles.","PeriodicalId":378788,"journal":{"name":"2008 58th Electronic Components and Technology Conference","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Low-temperature, fine-pitch interconnections using self-patternable metallic nanoparticles as the bonding layer\",\"authors\":\"G. Mehrotra, G. Jha, J. Goud, P. Raj, M. Venkatesan, M. Iyer, D. Hess, R. Tummala\",\"doi\":\"10.1109/ECTC.2008.4550162\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"High speed digital and mixed signal applications are driving short and more reliable fine pitch interconnection with higher I/O count in 3D architectures. Thin film die to wafer and wafer to wafer bonding with copper-based interconnections have several benefits in terms of low cost, process compatibility with semiconductor infrastructure, and the shortest interconnection with the best electrical performance. However, the bonding is accomplished at around 400 C, with pressures exceeding 30 N/cm2 which may not be compatible with thinned dies, and in ultrahigh vacuum and cleanroom environments with careful copper oxide cleaning procedures. The bonding time is typically 1 hour, which also limits the throughput. The process windows are relatively narrow with several temperature compatibility issues. This paper deals with low temperature bonding process using high surface energy metallic nanoparticles such as copper and gold. Bonding is enhanced by accelerated diffusion kinetics. Self patterning technique has also been developed to assist fine pitch bonding. This is based on selective wetting or selective deposition of nanoparticles.\",\"PeriodicalId\":378788,\"journal\":{\"name\":\"2008 58th Electronic Components and Technology Conference\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 58th Electronic Components and Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.2008.4550162\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 58th Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2008.4550162","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

高速数字和混合信号应用正在推动3D架构中具有更高I/O计数的短且更可靠的细间距互连。采用铜基互连的薄膜晶圆键合和晶圆键合具有以下几个优点:低成本、与半导体基础设施的工艺兼容性以及具有最佳电气性能的最短互连。然而,粘合是在400℃左右完成的,压力超过30 N/cm2,这可能与薄模具不兼容,并且在超高真空和洁净室环境中进行仔细的氧化铜清洁程序。绑定时间通常为1小时,这也限制了吞吐量。工艺窗口相对较窄,有几个温度兼容性问题。本文研究了高表面能金属纳米粒子(如铜和金)的低温键合工艺。通过加速扩散动力学增强了键合。自成图化技术也被开发用于辅助细间距键合。这是基于选择性润湿或选择性沉积纳米颗粒。
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Low-temperature, fine-pitch interconnections using self-patternable metallic nanoparticles as the bonding layer
High speed digital and mixed signal applications are driving short and more reliable fine pitch interconnection with higher I/O count in 3D architectures. Thin film die to wafer and wafer to wafer bonding with copper-based interconnections have several benefits in terms of low cost, process compatibility with semiconductor infrastructure, and the shortest interconnection with the best electrical performance. However, the bonding is accomplished at around 400 C, with pressures exceeding 30 N/cm2 which may not be compatible with thinned dies, and in ultrahigh vacuum and cleanroom environments with careful copper oxide cleaning procedures. The bonding time is typically 1 hour, which also limits the throughput. The process windows are relatively narrow with several temperature compatibility issues. This paper deals with low temperature bonding process using high surface energy metallic nanoparticles such as copper and gold. Bonding is enhanced by accelerated diffusion kinetics. Self patterning technique has also been developed to assist fine pitch bonding. This is based on selective wetting or selective deposition of nanoparticles.
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