{"title":"ESL在双核SoC平台设计中的应用","authors":"A. Su, Robert Chen","doi":"10.1109/SOCC.2006.283874","DOIUrl":null,"url":null,"abstract":"We applied electronic system level design methodology (ESL) in the dual-core system-on-a-chip (SoC) platform designing. It included implementing components at transaction level (TL) using SystemC, adapting a self designed digital signal processor (DSP) into system-level simulators and modeling virtual platform architectures to conduct an experiment to compare inter-process communication (IPC) mechanisms using mailbox and shared memory. We also experimented in applying a new transaction level component (TLC) definition for modeling training and discussed the need for separating transaction passing implementation from computation.","PeriodicalId":345714,"journal":{"name":"2006 IEEE International SOC Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Applying ESL in A Dual-Core SoC Platform Designing\",\"authors\":\"A. Su, Robert Chen\",\"doi\":\"10.1109/SOCC.2006.283874\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We applied electronic system level design methodology (ESL) in the dual-core system-on-a-chip (SoC) platform designing. It included implementing components at transaction level (TL) using SystemC, adapting a self designed digital signal processor (DSP) into system-level simulators and modeling virtual platform architectures to conduct an experiment to compare inter-process communication (IPC) mechanisms using mailbox and shared memory. We also experimented in applying a new transaction level component (TLC) definition for modeling training and discussed the need for separating transaction passing implementation from computation.\",\"PeriodicalId\":345714,\"journal\":{\"name\":\"2006 IEEE International SOC Conference\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2006.283874\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2006.283874","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Applying ESL in A Dual-Core SoC Platform Designing
We applied electronic system level design methodology (ESL) in the dual-core system-on-a-chip (SoC) platform designing. It included implementing components at transaction level (TL) using SystemC, adapting a self designed digital signal processor (DSP) into system-level simulators and modeling virtual platform architectures to conduct an experiment to compare inter-process communication (IPC) mechanisms using mailbox and shared memory. We also experimented in applying a new transaction level component (TLC) definition for modeling training and discussed the need for separating transaction passing implementation from computation.