{"title":"用于8-PSK EDGE接收机的高效降低状态DDFSE均衡器","authors":"M. Jamalabdollahi, S. Salari","doi":"10.1109/ICCITECHNOL.2011.5762696","DOIUrl":null,"url":null,"abstract":"New method for equalization and symbol detection for 8-PSK EDGE system is investigated in this study. The exact solution to this problem, Maximum Likelihood Sequence Estimation (MLSE) turns out to be too complex for practical purposes, but this method introduce a new version of Delayed Decision Feedback Sequence Estimation (DDFSE) equalizer that has less complexity and totally comparable performance with complete DDFSE. Simulation results compare our method with DDFSE and lower complexity methods over Rayleigh multipath fading channel. For final step we show the efficiency of our method based on received packet in receiver hardware in trade off between time that each algorithm needs for process a received frame and BER.","PeriodicalId":211631,"journal":{"name":"2011 International Conference on Communications and Information Technology (ICCIT)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Efficient reduced state DDFSE equalizer for 8-PSK EDGE receiver\",\"authors\":\"M. Jamalabdollahi, S. Salari\",\"doi\":\"10.1109/ICCITECHNOL.2011.5762696\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"New method for equalization and symbol detection for 8-PSK EDGE system is investigated in this study. The exact solution to this problem, Maximum Likelihood Sequence Estimation (MLSE) turns out to be too complex for practical purposes, but this method introduce a new version of Delayed Decision Feedback Sequence Estimation (DDFSE) equalizer that has less complexity and totally comparable performance with complete DDFSE. Simulation results compare our method with DDFSE and lower complexity methods over Rayleigh multipath fading channel. For final step we show the efficiency of our method based on received packet in receiver hardware in trade off between time that each algorithm needs for process a received frame and BER.\",\"PeriodicalId\":211631,\"journal\":{\"name\":\"2011 International Conference on Communications and Information Technology (ICCIT)\",\"volume\":\"67 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-03-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 International Conference on Communications and Information Technology (ICCIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCITECHNOL.2011.5762696\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 International Conference on Communications and Information Technology (ICCIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCITECHNOL.2011.5762696","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Efficient reduced state DDFSE equalizer for 8-PSK EDGE receiver
New method for equalization and symbol detection for 8-PSK EDGE system is investigated in this study. The exact solution to this problem, Maximum Likelihood Sequence Estimation (MLSE) turns out to be too complex for practical purposes, but this method introduce a new version of Delayed Decision Feedback Sequence Estimation (DDFSE) equalizer that has less complexity and totally comparable performance with complete DDFSE. Simulation results compare our method with DDFSE and lower complexity methods over Rayleigh multipath fading channel. For final step we show the efficiency of our method based on received packet in receiver hardware in trade off between time that each algorithm needs for process a received frame and BER.
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