A multistage atm switch with interstage buffer

Asynchronous Transfer Mode (ATM) is the recommended transport technique for the Broadband ISDN by CCITT (I.121). Many switches have been proposed to accommodate the ATM that requires fast packet switching capability [1-8]. The proposed switches for the Broadband ISDN can be cLassified as input queueing or output queueing type. The input queueing type have a throughput performance which is approximately 58 percent that of the output queueing type [1]. However, output queueing networks require larger amounts of hardware than input queueing networks [2]. In this paper, we propose a new multistage switch with internal buffering that approaches a maximum throughput of 100% as the buffering is increased. The switch is capable of broadcasting and self-routing. It consists of two switching planes which consist of packet processors, 2x2 switching elements, distributors and buffers located between stages and in the output ports. The internal data rate of the proposed switch is the same as that of the arriving information stream. In this sense, the switch does not require speedup. The switch has Iog2 N stages that forward packets in store-and-forward fashion, thus incurring a latency of log2 N time periods. Performance analysis shows additional delay is small.