Hsien-Ku Chen, Kuan-Ting Lin, Tao Wang, Shey-Shi Lu
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A compact-size dual-band (tri-mode) receiver front-end with switched harmonic mixer and technology scaling
In this paper, a new dual-band receiver frontend for 2.5GHz and 4.9 to 5.9GHz is proposed in 90nm CMOS technology. The proposed receiver front-end embraces a 2.5/5∼6GHz dual-band low noise amplifier (LNA), a switchable harmonic mixer, an octuple-phase generator, and a wideband 10GHz phase locked-loop. By scaling LC VCO with constant performance, the chip size for LO part is reduced readily. The receiver front-end has 27.5/26.5dB of conversion gain, −28/−27dBm of P1dB, −16/−16.5dBm of IIP3, and 10.2/9dBm of IIP2 in 2.5/5∼6GHz bands. The power consumption of the receiver and the PLL are 42mW and 18mW, respectively under 1.2V supply voltage. Such a low power dissipation is due to short routing path of the new proposed frequency planning.
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