{"title":"MOS数字滤波电路","authors":"J. Harbridge, R. H. Macmillan","doi":"10.1109/ESSCIRC.1980.5468798","DOIUrl":null,"url":null,"abstract":"This paper describes a digital filter and level detector (FAD) circuit realised in MOS technology. The architecture makes it suitable for a wide range of applications, particularly in the telecommunications field.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An MOS Digital Filter Circuit\",\"authors\":\"J. Harbridge, R. H. Macmillan\",\"doi\":\"10.1109/ESSCIRC.1980.5468798\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a digital filter and level detector (FAD) circuit realised in MOS technology. The architecture makes it suitable for a wide range of applications, particularly in the telecommunications field.\",\"PeriodicalId\":168272,\"journal\":{\"name\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1980-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 80: 6th European Solid State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1980.5468798\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 80: 6th European Solid State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1980.5468798","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes a digital filter and level detector (FAD) circuit realised in MOS technology. The architecture makes it suitable for a wide range of applications, particularly in the telecommunications field.
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