D. Garrett, G. Woodward, L. Davis, G. Knagge, C. Nicol
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A 28.8 Mb/s 4/spl times/4 MIMO 3G high-speed downlink packet access receiver with normalized least mean square equalization
A receiver for high-speed downlink packet access supporting 28.8 Mb/s using QPSK over a 5 MHz frequency selective 4/spl times/4 MIMO wireless channel (5.76 b/s/Hz). A key feature is the normalized least mean squares space-time equalizer using a pilot correlator for more accurate adaptation. Fabricated in 0.18 /spl mu/m 6M CMOS, the core of the chip covers an 11.6 mm/sup 2/ area.
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