栅极环绕结构对极性TFET的影响及射频/模拟分析

Chithraja Rajan, Priya Suman, B. Neole, Jyoti Patel
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摘要

在当今的场景中,在资源受限的物联网应用中,一种能够最大限度地减少功耗的多功能设备需求很高。针对这一点,我们展示了一种纳米线ttfet器件,该器件由栅极全绕结构组成,具有更好的栅极可控性和异质介质作为栅极氧化物。源侧高k氧化物提供高导通电流,即4.28× 1$0^{-5}$ a /$\mu$m,阈值电压为0.3 V,符合低功率器件的ITRS规范。此外,采用基于极性的概念代替基元掺杂器件来提供对rdf的免疫,并进行RF分析以判断其在无线通信和RFIC应用中的能力;有效地获得了0.6 PHz的高截止频率和60 THz的GBP。与此同时,还获得了高开关速度,这对于数字和模拟应用都是非常可取的。
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Impact of Gate All Around Architecture in Polarity Based TFET with RF/Analog Analysis
In today’s scenario, a versatile device to minimise power consumption in resource constraint IoT applications are on high demand. Focusing this, we demonstrate a nanowire TFET device comprising of a gate all around structure for better gate controllability and hetero dielectric as gate oxide. Presented high-k oxide at source side provides a high ON-current i.e. 4.28× 1$0^{-5}$A/$\mu$m and threshold voltage i.e. 0.3 V, which follows ITRS norms for low power devices. Additionally, instead of fundamental doped device, polarity-based concept is incorporated to provide immunity against RDFs and RF analysis is performed to judge its capability for wireless communication and RFIC applications; in which high cutoff frequency of 0.6 PHz and GBP of 60 THz are effectively obtained. Along with this, a high switching speed is also obtained, which is very much preferable for digital as well as analog applications.
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