低功耗亚阈值线性反馈移位寄存器的设计

K. Gupta, P. Sharma, N. Pandey
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引用次数: 2

摘要

本文研究了亚阈值区线性反馈移位寄存器的设计。LFSR需要D个触发器和异或门来实现。针对D触发器和异或门的不同电路类型,提出了四种不同的LFSR结构。第一种架构采用真单相时钟(TSPC) D触发器和静态CMOS XOR门,第二种架构采用基于TSPC的D触发器和基于传输门的XOR门。其他两种架构使用基于传输门的D触发器,不同之处在于使用异或门(静态CMOS或传输门)。采用0.18µm TSMC CMOS技术参数,通过SPICE仿真验证了所提出架构的功能。在最高频率和功耗的基础上比较了所提出架构的性能。结果表明,采用基于TSPC的D触发器的LFSR能够实现最高的工作频率,满足VLSI芯片的低功耗要求。
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Design of low power subthreshold linear feedback shift registers
This paper focuses on the design of linear feedback shift register (LFSR) in subthreshold regime. An LFSR requires D flip flops and exclusive OR (XOR) gates for its realization. Four different LFSR architectures based on different types of circuits for D flip flop and XOR gate are put forward. The first architecture uses true-single phase clock (TSPC) D flip-flop and static CMOS XOR gate, the second employs TSPC based D flip-flop and Transmission Gate based XOR gate. The other two architectures use transmission gate based D flip flop and differ in the use XOR gate (static CMOS or transmission gate). The functionality of the proposed architectures is verified through SPICE simulations using 0.18 µm TSMC CMOS technology parameters. The performance of the proposed architectures is compared on the basis of highest frequency and power consumption. It is found that the LFSR employing TSPC based D flip flop are capable of achieving highest operating frequency and satisfy the low-power concern of the VLSI chips.
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