低箝位电压保护提高电源ESD稳健性

2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD) Pub Date : 2018-09-01 DOI:10.23919/EOS/ESD.2018.8509793

Koki Narita, M. Okushima

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引用次数: 7

摘要

提出了一种片内保护方法，以提高电源ESD的稳健性。与传统的rc触发钳相比，所提出的功率钳通过延长大mos的激活时间，同时考虑到误激活，从而降低了受电ESD事件影响的箝位电压。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low Clamping Voltage Protection for Improvements of Powered ESD Robustness

An on-chip protection for improvements of powered ESD robustness is presented. The proposed power clamp achieved to reduce the clamping voltage against powered ESD events compared to a conventional RC-riggered clamp by extending of the big-MOS active time with also consideration to false activation.

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2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD)

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