{"title":"FPGA的挑战","authors":"Z. Vranesic","doi":"10.1109/ISMVL.1998.679318","DOIUrl":null,"url":null,"abstract":"Examines some key issues in the development of field-programmable gate arrays (FPGAs). Design factors that determine the performance and effectiveness of these devices are discussed. The main emphasis is on the structure of logic blocks and interconnection resources. Potential areas for application of multiple-valued logic techniques are considered.","PeriodicalId":377860,"journal":{"name":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"The FPGA challenge\",\"authors\":\"Z. Vranesic\",\"doi\":\"10.1109/ISMVL.1998.679318\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Examines some key issues in the development of field-programmable gate arrays (FPGAs). Design factors that determine the performance and effectiveness of these devices are discussed. The main emphasis is on the structure of logic blocks and interconnection resources. Potential areas for application of multiple-valued logic techniques are considered.\",\"PeriodicalId\":377860,\"journal\":{\"name\":\"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-05-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISMVL.1998.679318\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 1998 28th IEEE International Symposium on Multiple- Valued Logic (Cat. No.98CB36138)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISMVL.1998.679318","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Examines some key issues in the development of field-programmable gate arrays (FPGAs). Design factors that determine the performance and effectiveness of these devices are discussed. The main emphasis is on the structure of logic blocks and interconnection resources. Potential areas for application of multiple-valued logic techniques are considered.