{"title":"一种在0.13μm CMOS中使用隐含逻辑的多态15GHz/mW无电感频率预分频器","authors":"E. Roa, Wu-Hsin Chen, B. Jung","doi":"10.1109/RFIT.2012.6401617","DOIUrl":null,"url":null,"abstract":"This paper describes a power-efficient frequency prescaler operating at maximum frequency of 12.3GHz without using inductors. A novel logic concept and reconfigurable technique is presented to achieve two division factors by using just one single-phase clock flip-flop. The prescaler is implemented in 0.13μm CMOS technology. It occupies 14×12μm2 and consumes 817μW at maximum frequency. Experimental results indicate a power efficient and compact frequency divider working in wide frequency range from 5GHz to 12.3GHz.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A polymorphic 15GHz/mW inductorless frequency prescaler using implication logic in 0.13μm CMOS\",\"authors\":\"E. Roa, Wu-Hsin Chen, B. Jung\",\"doi\":\"10.1109/RFIT.2012.6401617\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a power-efficient frequency prescaler operating at maximum frequency of 12.3GHz without using inductors. A novel logic concept and reconfigurable technique is presented to achieve two division factors by using just one single-phase clock flip-flop. The prescaler is implemented in 0.13μm CMOS technology. It occupies 14×12μm2 and consumes 817μW at maximum frequency. Experimental results indicate a power efficient and compact frequency divider working in wide frequency range from 5GHz to 12.3GHz.\",\"PeriodicalId\":187550,\"journal\":{\"name\":\"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIT.2012.6401617\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIT.2012.6401617","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A polymorphic 15GHz/mW inductorless frequency prescaler using implication logic in 0.13μm CMOS
This paper describes a power-efficient frequency prescaler operating at maximum frequency of 12.3GHz without using inductors. A novel logic concept and reconfigurable technique is presented to achieve two division factors by using just one single-phase clock flip-flop. The prescaler is implemented in 0.13μm CMOS technology. It occupies 14×12μm2 and consumes 817μW at maximum frequency. Experimental results indicate a power efficient and compact frequency divider working in wide frequency range from 5GHz to 12.3GHz.