{"title":"FPGA实现的一种自适应遗传算法","authors":"Mengxu Fang, Tang Bin","doi":"10.1109/ICSSSM.2015.7170318","DOIUrl":null,"url":null,"abstract":"In this paper, the adaptive genetic algorithm (AGA) is designed use Field Programmable Gate Array (FPGA) based on modular design. First, the FPGA's internal structure and the basic design process are introduced, to Altera Cyclone III series chips as an example. Secondly algorithm of hardware and software environment is introduced. The software is Altera's integrated development software, the Quartus II, development board is SOC/family experiment KX_7C series of experimental development system. Then the AGA is divided into some modules, such as fitness calculation module, control module, population initialization module, selection module, crossover and mutation module, data channel selection module, random number generator module, and memory module, etc. Finally the top-level module is downloaded to the Altera Cyclone III-EP3C40Q240C8N chip, and program is run out and debugged on the development board. Finally we compared the results of the hardware and software running.","PeriodicalId":211783,"journal":{"name":"2015 12th International Conference on Service Systems and Service Management (ICSSSM)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"FPGA implementation of an adaptive genetic algorithm\",\"authors\":\"Mengxu Fang, Tang Bin\",\"doi\":\"10.1109/ICSSSM.2015.7170318\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the adaptive genetic algorithm (AGA) is designed use Field Programmable Gate Array (FPGA) based on modular design. First, the FPGA's internal structure and the basic design process are introduced, to Altera Cyclone III series chips as an example. Secondly algorithm of hardware and software environment is introduced. The software is Altera's integrated development software, the Quartus II, development board is SOC/family experiment KX_7C series of experimental development system. Then the AGA is divided into some modules, such as fitness calculation module, control module, population initialization module, selection module, crossover and mutation module, data channel selection module, random number generator module, and memory module, etc. Finally the top-level module is downloaded to the Altera Cyclone III-EP3C40Q240C8N chip, and program is run out and debugged on the development board. Finally we compared the results of the hardware and software running.\",\"PeriodicalId\":211783,\"journal\":{\"name\":\"2015 12th International Conference on Service Systems and Service Management (ICSSSM)\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-06-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 12th International Conference on Service Systems and Service Management (ICSSSM)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSSSM.2015.7170318\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 12th International Conference on Service Systems and Service Management (ICSSSM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSSSM.2015.7170318","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FPGA implementation of an adaptive genetic algorithm
In this paper, the adaptive genetic algorithm (AGA) is designed use Field Programmable Gate Array (FPGA) based on modular design. First, the FPGA's internal structure and the basic design process are introduced, to Altera Cyclone III series chips as an example. Secondly algorithm of hardware and software environment is introduced. The software is Altera's integrated development software, the Quartus II, development board is SOC/family experiment KX_7C series of experimental development system. Then the AGA is divided into some modules, such as fitness calculation module, control module, population initialization module, selection module, crossover and mutation module, data channel selection module, random number generator module, and memory module, etc. Finally the top-level module is downloaded to the Altera Cyclone III-EP3C40Q240C8N chip, and program is run out and debugged on the development board. Finally we compared the results of the hardware and software running.