{"title":"采用SOPC技术的WTB控制器的设计与实现","authors":"Juan Song, Lide Wang, Yunli Mu","doi":"10.1109/ICOSP.2008.4697730","DOIUrl":null,"url":null,"abstract":"The paper presents a novel WTB controller design method using SOPC (system on programmable chip) technology. The WTB Access IP (intellectual property), which is designed in Verilog HDL (hardware description language), achieves the function of encoding, decoding, FCS (frame check sequence) and bit stuffing. Finally the CPU and WTB controller are combined into one Alterapsilas Cyclone II EP2C8, so this method save PCB space and reduce total power consumption. The paper describes each modulepsilas function and design method specifically. Simultaneously the simulation and two different experimentspsila results are given.","PeriodicalId":445699,"journal":{"name":"2008 9th International Conference on Signal Processing","volume":"209 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design and implementation of WTB controller using SOPC technology\",\"authors\":\"Juan Song, Lide Wang, Yunli Mu\",\"doi\":\"10.1109/ICOSP.2008.4697730\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents a novel WTB controller design method using SOPC (system on programmable chip) technology. The WTB Access IP (intellectual property), which is designed in Verilog HDL (hardware description language), achieves the function of encoding, decoding, FCS (frame check sequence) and bit stuffing. Finally the CPU and WTB controller are combined into one Alterapsilas Cyclone II EP2C8, so this method save PCB space and reduce total power consumption. The paper describes each modulepsilas function and design method specifically. Simultaneously the simulation and two different experimentspsila results are given.\",\"PeriodicalId\":445699,\"journal\":{\"name\":\"2008 9th International Conference on Signal Processing\",\"volume\":\"209 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 9th International Conference on Signal Processing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICOSP.2008.4697730\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 9th International Conference on Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICOSP.2008.4697730","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文提出了一种利用SOPC (system on programmable chip)技术设计WTB控制器的新方法。WTB Access IP(知识产权)采用Verilog硬件描述语言HDL设计,实现了编码、解码、帧校验序列(FCS)和位填充等功能。最后将CPU和WTB控制器组合成一个Alterapsilas Cyclone II EP2C8,这样既节省了PCB空间,又降低了总功耗。文中详细介绍了各模块的功能和设计方法。同时给出了仿真和两种不同的实验结果。
Design and implementation of WTB controller using SOPC technology
The paper presents a novel WTB controller design method using SOPC (system on programmable chip) technology. The WTB Access IP (intellectual property), which is designed in Verilog HDL (hardware description language), achieves the function of encoding, decoding, FCS (frame check sequence) and bit stuffing. Finally the CPU and WTB controller are combined into one Alterapsilas Cyclone II EP2C8, so this method save PCB space and reduce total power consumption. The paper describes each modulepsilas function and design method specifically. Simultaneously the simulation and two different experimentspsila results are given.