The Gate Current in MOSFETs Versus Planar-NOI Devices

Recently reported, the Nothing On Insulator (NOI) device is based on the tunneling through a ultra-thin insulator placed between two semiconductors. A direct implementation of the NOI transistor that requires a vertical cavity etching in Si of 2nm width is a difficult technological task. Therefore, this paper proposes a simpler structure, based on the planar Si-technology. Rotating the NOI structure by 90°, the width of the cavity becomes the thickness of the cavity. If the vacuum is replaced by oxide, results a MOS capacitor without lateral junction but with lateral drain that is called p-NOI (planar-NOI variant). The p-NOI structure is simulated in Atlas and the results are compared with measured currents through the gate of fabricated MOSFETs. The main conduction mechanism is Fowler-Nordheim and secondary is quantum tunneling. The tunneling currents of the p-NOI structures obeys to the exponential law and are similar to the gate MOSFET currents. The currents are dominated by the insulator thickness and the gate voltage.