HV - 60v n/pLDMOS器件中漏极侧异质结器件添加对ESD抗扰度的影响

Sheng-Kai Fan, Shen-Li Chen, Y. Jhou, Pei-Lin Wu, Po-Lin Lin
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引用次数: 1

摘要

异质结肖特基二极管具有低正向压降和快速开关特性。因此,本文在60 V n/pLDMOS器件中去除漏极侧重掺杂区域,等效添加异质结器件,并评估其抗ESD能力。从TLP测量结果来看,优化后的nLDMOS二次击穿电流由2.35 A提高到3.85 A,提高了63.8%;优化后的pLDMOS二次击穿电流从0.78 A提高到2.83 A,提高了263%。从去掉LDMOS漏极侧的重掺杂区域可以发现,LDMOS器件相当于一个大串联异质结器件,对于提高n/pLDMOS器件的ESD可靠性确实是非常有效的。
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ESD Immunity Impacts of the Drain-Side Heterojunction Device Addition in HV 60 V n/pLDMOS Devices
A heterojunction-Schottky diode has a low forward-voltage drop and a fast switching feature. Therefore, in this paper, the drain side heavily doped region was removed and equivalently added a heterojunction device in 60 V n/pLDMOS devices, and evaluating its ability of ESD immunity. From the TLP measure result, the optimized secondary breakdown current of nLDMOS can be increased from 2.35 A to 3.85 A (improved 63.8%); the optimized secondary breakdown current of pLDMOS can be increased from 0.78 A to 2.83 A (improved 263%). It can be found that from removing the drain-side heavily doped region in LDMOS, LDMOS devices are equivalent with a large series heterojunction device, they are indeed very effective in improving the ESD reliability of n/pLDMOS devices.
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