{"title":"结合栅极工程的隧道场效应管电学特性优化","authors":"Susmitha Kothapalli, Ullas Pandey, B. Bhowmick","doi":"10.1109/MOS-AK.2019.8902361","DOIUrl":null,"url":null,"abstract":"In this paper, the electrical characteristics of different structures of TFET including ferrorelectric gate have been studied. The devices have been optimized in order to provide the best values of SS in each device. The best result obtained for SS is 22mV/dec and for ION/IOFF ratio is 4.4×1013. Temperature dependence of each device has been plotted and compared.","PeriodicalId":178751,"journal":{"name":"2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Optimization of electrical characteristics of Tunnel FET incorporating Gate Engineering\",\"authors\":\"Susmitha Kothapalli, Ullas Pandey, B. Bhowmick\",\"doi\":\"10.1109/MOS-AK.2019.8902361\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, the electrical characteristics of different structures of TFET including ferrorelectric gate have been studied. The devices have been optimized in order to provide the best values of SS in each device. The best result obtained for SS is 22mV/dec and for ION/IOFF ratio is 4.4×1013. Temperature dependence of each device has been plotted and compared.\",\"PeriodicalId\":178751,\"journal\":{\"name\":\"2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India)\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MOS-AK.2019.8902361\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MOS-AK.2019.8902361","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Optimization of electrical characteristics of Tunnel FET incorporating Gate Engineering
In this paper, the electrical characteristics of different structures of TFET including ferrorelectric gate have been studied. The devices have been optimized in order to provide the best values of SS in each device. The best result obtained for SS is 22mV/dec and for ION/IOFF ratio is 4.4×1013. Temperature dependence of each device has been plotted and compared.
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