基于FPGA的柔性VLIW处理器,用于实时图像处理

V. Brost, Charles Meunier, D. Saptono, Fan Yang
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引用次数: 5

摘要

现代FPGA芯片具有更大的存储容量和可重构性潜力,正在为嵌入式系统的快速原型设计开辟新的领域。随着高密度FPGA的出现,现在可以在FPGA中实现高性能的甚长指令字(VLIW)处理器核心。对于VLIW体系结构,处理器的有效性取决于编译器从程序代码中提供足够的指令级并行性(ILP)的能力。本文介绍了利用FPGA技术实现VLIW处理器模型用于实时处理应用的研究成果。我们的目标是保持处理器的灵活性,以缩短开发周期,并使用强大的FPGA资源,以提高实时性能。我们提出了一种灵活的VLIW VHDL处理器模型,该模型具有可变指令集和可定制的架构,允许使用先进的编译器技术利用目标应用程序的内在并行性,并以最佳方式在FPGA上实现它。利用所提出的开发周期,在基于Virtex-6的FPGA板上对一些常见的图像处理算法进行了测试和验证。我们的方法应用了协同设计工具的一些标准:灵活性、模块化、性能和可重用性。
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Flexible VLIW processor based on FPGA for real-time image processing
Modern FPGA chips, with their larger memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high density FPGAs it is now possible to implement a high performance Very Long Instruction Word (VLIW) processor core in an FPGA. With VLIW architecture, the processor effectiveness depends on the ability of compilers to provide sufficient Instruction Level Parallelism (ILP) from program code. This paper describes research result about enabling the VLIW processor model for real-time processing applications by exploiting FPGA technology. Our goals are to keep the flexibility of processors in order to shorten the development cycle, and to use the powerful FPGA resources in order to increase real-time performance. We present a flexible VLIW VHDL processor model with a variable instruction set and a customizable architecture which allow exploiting intrinsic parallelism of a target application using advanced compiler technology and implementing it in an optimal manner on FPGA. Some common algorithms of image processing were tested and validated on an FPGA Virtex-6 based board using the proposed development cycle. Our approach applies some criteria for co-design tools: flexibility, modularity, performance, and reusability.
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